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| 型号： | ICS557GI-03LFT |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO16 |
| 封装： | 0.173 INCH, GREEN, TSSOP-16 |
| 文件页数： | 3/9页 |
| 文件大小： | 215K |
| 代理商： | ICS557GI-03LFT |
PCI-EXPRESS CLOCK SOURCE
MDS 557-03
I
3
Revision 050306
In te gr ated Circuit Systems ● 525 Ra ce Street, San Jose, CA 9512 6 ● tel (4 08) 297-1 201 ● www.icst.com
ICS557-03
Applications Information
External Components
A minimum number of external components are
required for proper operation.
Decoupling Capacitors
Decoupling capacitors of 0.01
F should be connected
between each VDD pin and the ground plane, as close
to the VDD pin as possible. Do not share ground vias
between components. Route power from power source
through the capacitor pad and then into ICS pin.
Crystal
A 25 MHz fundamental mode parallel resonant crystal
should be used. This crystal must have less than 300
ppm of error across temperature in order for the
ICS557-03 to meet PCI Express specifications.
Crystal Capacitors
Crystal capacitors are connected from pins X1 to
ground and X2 to ground to optimize the accuracy of
the output frequency.
CL= Crystal’s load capacitance in pF
Crystal Capacitors (pF) = (CL- 8) * 2
For example, for a crystal with a 16 pF load cap, each
external crystal cap would be 16 pF. (16-8)*2=16.
Current Source (Iref) Reference Resistor - RR
If board target trace impedance (Z) is 50
, then R
R =
475
(1%), providing IREF of 2.32 mA. The output
current (IOH) is equal to 6*IREF.
Output Termination
The PCI-Express differential clock outputs of the
ICS557-03 are open source drivers and require an
external series resistor and a resistor to ground. These
resistor values and their allowable locations are shown
in detail in the PCI-Express Layout Guidelines
section.
The ICS557-03 can also be configured for LVDS
compatible voltage levels. See the LVDS Compatible
Layout Guidelines section.
Output Structures
General PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
1. Each 0.01F decoupling capacitor should be
mounted on the component side of the board as close
to the VDD pin as possible.
2. No vias should be used between decoupling
capacitor and VDD pin.
3. The PCB trace to VDD pin should be kept as short
as possible, as should the PCB trace to the ground via.
Distance of the ferrite bead and bulk decoupling from
the device is less critical.
4. An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers (any ferrite beads and bulk decoupling
capacitors can be mounted on the back). Other signal
traces should be routed away from the ICS557-03.This
includes signal traces just underneath the device, or on
layers adjacent to the ground plane layer used by the
device.
R
R 475
6*IREF
=2.3 mA
IREF
See Output Termination
Sections - Pages 3 ~ 5
相关PDF资料 |
PDF描述 |
|---|---|
| ICS557G-03LFT | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO16 |
| ICS557M-01 | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO8 |
| ICS557MI-01 | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO8 |
| ICS601G-01T | 156 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| ICS601M-01 | 156 MHz, OTHER CLOCK GENERATOR, PDSO16 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS557GI-03T | 功能描述:IC CLK SOURCE PCI EXPRSS 16TSSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:PCI Express® (PCIe) 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
| ICS557GI-05A | 制造商:ICS 制造商全称:ICS 功能描述:Quad Differential PCI-Express Clock Source |
| ICS557GI-05ALF | 功能描述:IC CLK SOURCE QUAD PCI 20-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:PCI Express® (PCIe) 标准包装:1 系列:- 类型:时钟/频率发生器，多路复用器 PLL:是 主要目的:存储器，RDRAM 输入:晶体 输出:LVCMOS 电路数:1 比率 - 输入:输出:1:2 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:Digi-Reel® 其它名称:296-6719-6 |
| ICS557GI-05ALFT | 功能描述:IC CLK SOURCE QUAD DIFF 20TSSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:PCI Express® (PCIe) 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP （0.240"，6.10mm 宽） 供应商设备封装:64-TSSOP 包装:管件 |
| ICS557GI-05ALFTR | 制造商:ICS 制造商全称:ICS 功能描述:Quad Differential PCI-Express Clock Source |
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