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参数资料
| 型号： | ICS601M-02IT |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 170 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| 封装： | SOIC-16 |
| 文件页数： | 3/5页 |
| 文件大小： | 635K |
| 代理商： | ICS601M-02IT |
ICS601-02
Low Phase Noise Clock Multiplier
MDS 601-02 D
3
Revision 111204
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA95126 (408) 295-9800tel www.icst.com
-140
-120
-100
-80
-60
-40
-20
0
10.0E+0
100.0E+0
1.0E+3
10.0E+3
100.0E+3
1.0E+6
10.0E+6
Offset from Carrier (Hz)
Phase
Noise
(dBc/Hz)
Figure 1. Phase Noise of ICS601-02 at 125 MHz out, 25 MHz crystal input, VDD =
3.3 V.
Figure 1 shows a typical phase noise measurement in a 125 MHz system. There are a few simple steps that can be
taken to achieve these levels of phase noise from the ICS601-02. Variations in VDD will increase the phase noise, so
it is important to have a stable, low noise supply voltage at the device. Use decoupling capacitors of 0.1 F in parallel
with 0.01 F. It is important to have these capacitors as close as possible to the ICS601-02 supply pins.
Disabling the REFOUT clock is also important for achieving low phase noise; lab tests have shown that this can
reduce the phase noise by as much as 10 dBc/Hz.
Achieving Low Phase Noise
External Components/Crystal Selection
The ICS601-02 requires a minimum number of external components for proper operation. Decoupling capacitors of
0.01 F and 0.1 F should be connected between VDD and GND, as close to the part as possible. A series
termination resistor of 33
may be used for the clock output. The crystal must be connected as close to the chip as
possible. The crystal should be fundamental mode, parallel resonant. Do not use third overtone. For exact tuning
when using a crystal, capacitors should be connected from pins X1 to ground and X2 to ground. In general, the value
of these capacitors is given by the following equation, where CL is the crystal load capacitance: Crystal caps (pF) =
(CL-5) x 2. So for a crystal with 16 pF load capacitance, two 22 pF caps can be used. For any given board layout, ICS
can measure the board capacitance and recommend the exact capacitance value to use.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS601R-25 | 功能描述:IC CLOCK MULTIPLIER 1:5 20-SSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 产品变化通告:Product Discontinuation 04/May/2011 标准包装:96 系列:- 类型:时钟倍频器，零延迟缓冲器 PLL:带旁路 输入:LVTTL 输出:LVTTL 电路数:1 比率 - 输入:输出:1:8 差分 - 输入:输出:无/无 频率 - 最大:133.3MHz 除法器/乘法器:是/无 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:管件 其它名称:23S08-5HPGG |
| ICS601R-25I | 功能描述:IC CLOCK MULTIPLIER 1:5 20-SSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 产品变化通告:Product Discontinuation 04/May/2011 标准包装:96 系列:- 类型:时钟倍频器，零延迟缓冲器 PLL:带旁路 输入:LVTTL 输出:LVTTL 电路数:1 比率 - 输入:输出:1:8 差分 - 输入:输出:无/无 频率 - 最大:133.3MHz 除法器/乘法器:是/无 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:管件 其它名称:23S08-5HPGG |
| ICS601R-25ILF | 功能描述:IC CLOCK MULTIPLIER 1:5 20-SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS601R-25ILFT | 功能描述:IC CLOCK MULTIPLIER 1:5 20-SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS601R-25IT | 功能描述:IC CLOCK MULTIPLIER 1:5 20-SSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 产品变化通告:Product Discontinuation 04/May/2011 标准包装:96 系列:- 类型:时钟倍频器，零延迟缓冲器 PLL:带旁路 输入:LVTTL 输出:LVTTL 电路数:1 比率 - 输入:输出:1:8 差分 - 输入:输出:无/无 频率 - 最大:133.3MHz 除法器/乘法器:是/无 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:管件 其它名称:23S08-5HPGG |
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