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参数资料
| 型号： | ICS650GI-47LFT |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 50 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| 封装： | 0.173 INCH, ROHS COMPLIANT, TSSOP-16 |
| 文件页数： | 4/10页 |
| 文件大小： | 166K |
| 代理商： | ICS650GI-47LFT |
Spread Spectrum Clock Synthesizer
MDS 650-47 B
3
Revision 082305
Integrated Circuit Systems, Inc.
● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
PRELIM INAR Y INFORM A T ION
ICS650-47
Pin Descriptions
External Components
Decoupling Capacitor
As with any high-performance mixed-signal IC, the
ICS650-47 must be isolated from system power supply
noise to perform optimally.
A decoupling capacitor of 0.01F must be connected
between each VDD and the PCB ground plane.
Series Termination Resistor
Clock output traces over one inch should use series
termination. To series terminate a 50
trace (a
commonly used trace impedance), place a 33
resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20
.
Crystal Load Capacitors
The device crystal connections should include pads for
small capacitors from X1 to ground and from X2 to
ground. These capacitors are used to adjust the stray
capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming
process, it is important to keep stray capacitance to a
minimum by using very short PCB traces (and no vias)
between the crystal and device. Crystal capacitors
must be connected from each of the pins X1 and X2 to
ground.
The value (in pF) of these crystal caps should equal
(CL -6 pF)*2. In this equation, CL= crystal load
capacitance in pF. Example: For a crystal with a 16 pF
load capacitance, each crystal capacitor would be 20
pF [(16-6) x 2] = 20.
Pin
Number
Pin Name
Pin
Type
Pin Description
1
X1/CLKIN
Input
Crystal input. Connect this pin to a 25 MHz crystal or external input
clock.
2
FS0
Input
Select pin 0. Internal pull-up resistor. See table on page 2.
3
FS1
Input
Select pin 1. Internal pull-up resistor. See table on page 2.
4
SS_EN
Input
Spread spectrum enable pin. Internal pull-up resistor. Enabled = high.
5
VDD
Power
Connect to +3.3 V.
6
GND
Power
Connect to ground.
7
FS3
Input
Select pin 3. Internal pull-up resistor. See table on page 2.
8
NC
—
No connect. No internal connection.
9
50M
Output
Spread Spectrum output. Weak internal pull-down when tri-stated.
10
VDDO
Power
Connect to +2.5 V.
11
GND
Power
Connect to ground.
12
VDD
Power
Connect to +3.3 V.
13
FS2
Input
Select pin 2. Internal pull-up resistor. See table on page 2.
14
PDTS
Input
Powers down entire chip. Tri-states CLK outputs when low. Internal
pull-up.
15
VDD
Power
Connect to +3.3 V.
16
X2
Output
Crystal Output. Connect this pin to a 25 MHz crystal. Do not connect if
clock input is used.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS650R-01 | 功能描述:IC CLK SYNTHESIZER 20-SSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 产品变化通告:Product Discontinuation 04/May/2011 标准包装:96 系列:- 类型:时钟倍频器，零延迟缓冲器 PLL:带旁路 输入:LVTTL 输出:LVTTL 电路数:1 比率 - 输入:输出:1:8 差分 - 输入:输出:无/无 频率 - 最大:133.3MHz 除法器/乘法器:是/无 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:管件 其它名称:23S08-5HPGG |
| ICS650R01I | 制造商:ICS 制造商全称:ICS 功能描述:System Peripheral Clock Source |
| ICS650R-01I | 功能描述:IC CLK SYNTHESIZER 20-SSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 产品变化通告:Product Discontinuation 04/May/2011 标准包装:96 系列:- 类型:时钟倍频器，零延迟缓冲器 PLL:带旁路 输入:LVTTL 输出:LVTTL 电路数:1 比率 - 输入:输出:1:8 差分 - 输入:输出:无/无 频率 - 最大:133.3MHz 除法器/乘法器:是/无 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:管件 其它名称:23S08-5HPGG |
| ICS650R-01ILF | 功能描述:IC CLK SYNTHESIZER 20-SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS650R-01ILFT | 功能描述:IC CLK SYNTHESIZER 20-SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:2,000 系列:- 类型:PLL 时钟发生器 PLL:带旁路 输入:LVCMOS，LVPECL 输出:LVCMOS 电路数:1 比率 - 输入:输出:2:11 差分 - 输入:输出:是/无 频率 - 最大:240MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP（7x7） 包装:带卷 (TR) |
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