参数资料
型号: ICS664G-03LFT
元件分类: 时钟产生/分配
英文描述: 148.5 MHz, VIDEO CLOCK GENERATOR, PDSO16
封装: 4.40 MM, 0.65 MM PITCH, LEAD FREE, MO-153, TSSOP-16
文件页数: 2/6页
文件大小: 142K
代理商: ICS664G-03LFT
Digital Video Clock Source
MDS 664-03 B
2
Revision 091404
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS664-03
Pin Assignment
16-pin TSSOP
Output Clock Selection Table
Pin Descriptions
12
1
11
2
10
X1/REFIN
X2
3
9
VDD
4
VDD
N/C
5
S0
6
VDD
7
GND
8
GND
SELIN
VDDO
S3
S1
S2
CLK
16
15
14
13
S3
S2
S1
S0
Input
Frequency
(MHz)
Output
Frequency
(MHz)
0000
Power down
0001
27
27 (passthrough)
0010
27
74.25
0011
27
74.175824
0100
13.5
74.25
0101
13.5
74.175824
0110
27
148.5000
0111
27
148.351648
1000
74.25
54
1001
74.175824
54
1010
74.25
27
1011
74.175824
27
1100
54
74.25
1101
54
74.175824
1110
54
13.5
1111
27
13.5
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
X1/REFIN
Input
Connect this pin to a crystal or clock input
2
VDD
Power
Power supply for crystal oscillator.
3
VDD
Power
Power supply for PLL.
4
S0
Input
Output frequency selection. Determines output frequency per table above. Internal pull-up.
5
GND
Power
Ground for PLL.
6
GND
Power
Ground for PLL for Crystal Osillator.
7
S3
Input
Output frequency selection. Determines output frequency per table above. Internal pull-up.
8
S2
Input
Output frequency selection. Determines output frequency per table above. Internal pull-up.
9
CLK
Output
Clock output.
10
S1
Input
Output frequency selection. Determines output frequency per table above. Internal pull-up.
11
VDDO
Power
Power supply for output stage.
12
SEL
Input
Low for clock input, high for crystal. Internal pull-up.
13
GND
Power
Ground for Output.
14
VDD
Power
Power supply.
15
NC
No connect. Do not connect to anything.
16
X2
Input
Connect this pin to a crystal. Leave open if using a clock input.
相关PDF资料
PDF描述
ICS664G-03T 148.5 MHz, VIDEO CLOCK GENERATOR, PDSO16
ICS664G-03 148.5 MHz, VIDEO CLOCK GENERATOR, PDSO16
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