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参数资料
| 型号： | ICS667M-01LF |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 2/6页 |
| 文件大小： | 0K |
| 描述： | IC CLK SYNTHESIZER HDTV 8-SOIC |
| 产品变化通告： | Product Discontinuation 09/Feb/2012 |
| 标准包装： | 97 |
| 类型： | 时钟/频率合成器 |
| PLL： | 是 |
| 输入： | 时钟，晶体 |
| 输出： | CMOS，晶体 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:2 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 74.18MHz |
| 除法器/乘法器： | 无/无 |
| 电源电压： | 3.15 V ~ 3.465 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 管件 |
| 其它名称： | 667M-01LF |
ICS667-01
HDTV CLOCK SYNTHESIZER
CLOCK SYNTHESIZER
IDT / ICS HDTV CLOCK SYNTHESIZER
2
ICS667-01
REV E 051310
Pin Assignment
Pin Descriptions
External Components
Decoupling Capacitor
As with any high performance mixed-signal IC, the
ICS667-01 must be isolated from system power supply
noise to perform optimally.
A decoupling capacitor of 0.01F must be connected
between VDD and GND on pins 2 and 3. It must be
connected close to the ICS667-01 to minimize lead
inductance. Pin 5 can be connected to pin 3. No external
power supply filtering is required for the ICS667-01.
Series Termination Resistor
A 33
terminating resistor can be used next to the clock
outputs for trace lengths over one inch.
Crystal Load Capacitors
The total on-chip capacitance is approximately 18 pF. A
parallel resonant, fundamental mode, AT cut 27 MHz crystal
should be used. The device crystal connections should
include pads for small capacitors from X1 to ground and
from X2 to ground. These capacitors are used to adjust the
stray capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming process,
it is important to keep stray capacitance to a minimum by
using very short PCB traces (and no vias) between the
crystal and device. Crystal capacitors, if needed, must be
connected from each of the pins X1 and X2 to ground.
The value (in pF) of these crystal caps should equal (CL -16
pF)*2. In this equation, CL= crystal load capacitance in pF.
Example: For a crystal with an 18 pF load capacitance, each
crystal capacitor would be 4 pF [(18-16) x 2] = 4.
ICLK/X1
VDD
GND
27M
CLK
OE
GND
X2
1
2
3
4
8
7
6
5
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
ICLK/X1
XI
Crystal connection. Connect to a 27 MHz fundamental crystal or clock.
2
VDD
Power
Connect to +3.3 V.
3
GND
Power
Connect to ground.
4
CLK
Output
74.17582418 MHz.
5
GND
Power
Connect to ground.
6
OE
Input
Output enable. Tri-states CLK output when low. Internal pull-up to VDD.
7
27M
Output
27 MHz buffered clock or crystal oscillator output.
8
X2
XO
Crystal connection. Connect to a 27 MHz crystal, or leave unconnected
for clock input.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS667M-01LFT | 功能描述:IC CLK SYNTHESIZER HDTV 8-SOIC RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 产品变化通告:Product Discontinuation 04/May/2011 标准包装:96 系列:- 类型:时钟倍频器，零延迟缓冲器 PLL:带旁路 输入:LVTTL 输出:LVTTL 电路数:1 比率 - 输入:输出:1:8 差分 - 输入:输出:无/无 频率 - 最大:133.3MHz 除法器/乘法器:是/无 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:管件 其它名称:23S08-5HPGG |
| ICS667M-01T | 功能描述:IC CLK SYNTHESIZER HDTV 8-SOIC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 产品变化通告:Product Discontinuation 04/May/2011 标准包装:96 系列:- 类型:时钟倍频器，零延迟缓冲器 PLL:带旁路 输入:LVTTL 输出:LVTTL 电路数:1 比率 - 输入:输出:1:8 差分 - 输入:输出:无/无 频率 - 最大:133.3MHz 除法器/乘法器:是/无 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:管件 其它名称:23S08-5HPGG |
| ICS670-01 | 制造商:ICS 制造商全称:ICS 功能描述:Low Phase Noise Zero Delay Buffer and Multiplier |
| ICS670-02 | 制造商:ICS 制造商全称:ICS 功能描述:LOW PHASE NOISE, ZERO DELAY BUFFER AND MULTIPLIER |
| ICS670-03 | 制造商:ICS 制造商全称:ICS 功能描述:LOW PHASE NOISE, ZERO DELAY BUFFER AND MULTIPLIER |
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