参数资料
型号: ICS81006AKILF
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 40 MHz, OTHER CLOCK GENERATOR, QCC20
封装: 4 X 4 MM, 0.95 MM HEIGHT, ROHS COMPLIANT, MO-220, VFQFN-20
文件页数: 14/14页
文件大小: 316K
代理商: ICS81006AKILF
81006AKI
www.icst.com/products/hiperclocks.html
REV. A JANUARY 19, 2006
9
Integrated
Circuit
Systems, Inc.
ICS81006I
VCXO-TO-6 LVCMOS OUTPUTS
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LV
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V
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=4
.
5
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HV
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3
.
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=6
.
9
2F
p
TABLE 6. VARACTOR PARAMETERS
FORMULAS
(
) (
)
() (
)
Low
V
S
L
Low
V
S
L
Low
V
S
L
Low
V
S
L
Low
C
_
2
_
1
_
2
_
1
+
+
=
(
) (
)
() (
)
High
V
S
L
High
V
S
L
High
V
S
L
High
V
S
L
High
C
_
2
_
1
_
2
_
1
+
+
=
6
0
1
0
1
0
10
1
2
1
2
1
)
(
+
+
=
C
TPR
Range
Pull
Total
High
Low
C
Low is the effective capacitance due to the low varactor capacitance, load capacitance and stray capacitance.
C
Low determines the high frequency component on the TPR.
C
High is the effective capacitance due to the high varactor capacitance, load capacitance and stray capacitance.
C
High determines the low frequency component on the TPR.
Absolute Pull Range (APR) = Total Pull Range – (Frequency Tolerance + Frequency Stability + Aging)
EXAMPLE CALCULATIONS
Using the tables and figures above, we can now calculate the
TPR and APR of the VCXO using the example crystal
parameters. For the numerical example below there were some
assumptions made. First, the stray capacitance (C
S1, CS2), which
is all the excess capacitance due to board parasitic, is 4pF.
Second, the expected lifetime of the project is 5 years; hence
the inaccuracy due to aging is ±15ppm. Third, though many
boards will not require load tuning capacitors (C
L1, CL2), it is
recommended for long-term consistent performance of the
system that two tuning capacitor pads be placed into every
design. Typical values for the load tuning capacitors will range
from 0 to 4pF.
() ()
pf
C
Low
7
.
9
4
.
15
4
0
4
.
15
4
0
4
.
15
4
0
4
.
15
4
0
=
+
+
=
() ()
() (
)
pf
C
High
8
.
16
6
.
29
4
0
6
.
29
4
0
6
.
29
4
0
6
.
29
4
0
=
+
+
=
ppm
pF
TPR
5
.
226
10
4
8
.
16
1
220
2
1
4
7
.
9
1
220
2
1
6
=
+
+
=
TPR = ±113.25ppm
APR = 113.25ppm – (20ppm + 20ppm + 15ppm) = ±58.25ppm
The example above will ensure a total pull range of
±113.25 ppm with an APR of ±58.25ppm. Many times, board
designers may select their own crystal based on their
application. If the application requires a tighter APR, a crystal
with better pullability (C0/C1 ratio) can be used. Also, with the
equations above, one can vary the frequency tolerance,
temperature stability, and aging or shunt capacitance to achieve
the required pullability.
ICS81006I
VCXO-TO-6 LVCMOS OUTPUTS
TSD
IDT / ICS VCXO-TO-6 LVCMOS OUTPUTS
ICS81006I
9
相关PDF资料
PDF描述
ICS81006AKIT 40 MHz, OTHER CLOCK GENERATOR, QCC20
ICS81006AKILF 40 MHz, OTHER CLOCK GENERATOR, QCC20
ICS81006AKLFT 40 MHz, OTHER CLOCK GENERATOR, QCC20
ICS81006AKLFT 40 MHz, OTHER CLOCK GENERATOR, QCC20
ICS810251AGI 25 MHz, OTHER CLOCK GENERATOR, PDSO16
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