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参数资料
| 型号： | ICS83021AMILFT |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 9/10页 |
| 文件大小： | 0K |
| 描述： | IC CLK BUFFER DVR TRANSLA 8-SOIC |
| 标准包装： | 2,500 |
| 系列： | HiPerClockS™ |
| 类型： | 缓冲器/驱动器，变换器 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:1 |
| 差分 - 输入:输出： | 是/无 |
| 输入： | HCSL，LVDS，LVHSTL，LVPECL，SSTL |
| 输出： | LVCMOS，LVTTL |
| 频率 - 最大： | 350MHz |
| 电源电压： | 2.375 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 带卷 (TR) |
| 其它名称： | 83021AMILFT |
IDT / ICS LVCMOS/LVTTL ZERO DELAY CLOCK BUFFER
8
ICS86004 REV B JUNE 21, 2006
ICS86004
15.625MHZ TO 62.5MHZ, 1:4 LVCMOS/LVTTL ZERO DELAY CLOCK BUFFER
APPLICATION INFORMATION
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS86004 provides sepa-
rate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
DD, VDDA, and VDDO
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance, power
supply isolation is required.
Figure 1 illustrates how
a 10
resistor along with a 10F and a .01F bypass
capacitor should be connected to each V
DDA.
POWER SUPPLY FILTERING TECHNIQUES
FIGURE 1. POWER SUPPLY FILTERING
10
V
DDA
10
F
.01
F
3.3V
.01
F
V
DD
INPUTS:
LVCMOS CONTROL PINS:
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVCMOS OUTPUT:
All unused LVCMOS output can be left floating. We recommend
that there is no trace attached.
FIGURE 2. ICS86004 SCHEMATIC EXAMPLE
SCHEMATIC EXAMPLE
Figure 2 shows a schematic example of using an ICS86004. It is
recommended to have one decouple capacitor per power pin.
Each decoupling capacitor should be located as close as possible
to the power pin. The low pass filter R7, C11 and C16 for
clean analog supply should also be located as close to the
V
DDA pin as possible.
VDD
Ro ~ 7 Ohm
LVCMOS
R4
100
U1
ICS86004
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Q1
GND
Q0
F_SEL
VDD
CLK
GND
VDDA
PLL_SEL
FB_IN
MR
VDDO
Q3
GND
Q2
VDDO
VDD
R3
1K
C11
0.01u
R2
43
VDD
Zo = 50
R11
43
Serial Termination
VDD
R6
1K
Zo = 50
(U1-12)
VDD
C2
0.1uF
(U1-5)
Zo = 50
VDD
C16
10u
VDD=3.3V
R8
43
Parallel Termination
Zo = 50
R7
10
R1
43
VDD
C3
0.1uF
(U1-16)
C1
0.1uF
R5
100
相关PDF资料 |
PDF描述 |
|---|---|
| ICS83023AMILF | IC CLK BUFFER TRANSLA 1:1 8-SOIC |
| ICS83026AMILFT | IC CLK BUFFER 1:2 350MHZ 8-SOIC |
| ICS83026BMI-01LFT | IC CLK BUFFER 1:2 350MHZ 8-SOIC |
| ICS8304AM-01LFT | IC CLK BUFFER 1:4 166MHZ 8-SOIC |
| ICS8304AMILFT | IC CLK BUFFER 1:4 166MHZ 8-SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS83021AMIT | 制造商:ICS 制造商全称:ICS 功能描述:2.5V, 3.3V DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR |
| ICS83021I | 制造商:ICS 制造商全称:ICS 功能描述:2.5V, 3.3V DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR |
| ICS830-21I | 制造商:ICS 制造商全称:ICS 功能描述:2.5V, 3.3V DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR |
| ICS83023 | 制造商:ICS 制造商全称:ICS 功能描述:DUAL, 1-TO-1 DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER |
| ICS83023AMI | 制造商:ICS 制造商全称:ICS 功能描述:DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER |
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