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参数资料
| 型号： | ICS83026BMI-01LFT |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 15/15页 |
| 文件大小： | 0K |
| 描述： | IC CLK BUFFER 1:2 350MHZ 8-SOIC |
| 标准包装： | 2,500 |
| 系列： | HiPerClockS™ |
| 类型： | 扇出缓冲器（分配） |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:2 |
| 差分 - 输入:输出： | 是/无 |
| 输入： | HCSL，LVDS，LVHSTL，LVPECL，SSTL |
| 输出： | LVCMOS，LVTTL |
| 频率 - 最大： | 350MHz |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 带卷 (TR) |
| 其它名称： | 83026BMI-01LFT |
83026BMI-01
9
REV. A AUGUST 4, 2010
ICS83026I-01
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER
APPLICATION INFORMATION
Figure 1 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
DD/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
FIGURE 1. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT
WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
DD = 3.3V, V_REF should be 1.25V
and R2/R1 = 0.609.
V_REF
R1
1K
C1
0.1u
R2
1K
Single Ended Clock Input
CLK
nCLK
VDD
OUTPUTS:
LVCMOS OUTPUTS
All unused LVCMOS output can be left floating. We recommend
that there is no trace attached.
RECOMMENDATIONS FOR UNUSED OUTPUT PINS
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS83026BMI-01T | 制造商:ICS 制造商全称:ICS 功能描述:LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER |
| ICS83026I | 制造商:ICS 制造商全称:ICS 功能描述:LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER |
| ICS83026I-01 | 制造商:ICS 制造商全称:ICS 功能描述:LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER |
| ICS8302AM | 制造商:ICS 功能描述: |
| ICS8302AM-01 | 制造商:ICS 制造商全称:ICS 功能描述:LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT |
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