参数资料
型号: ICS8344BYLFT
元件分类: 时钟及定时
英文描述: LOW SKEW CLOCK DRIVER, 24 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48
封装: 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-48
文件页数: 5/16页
文件大小: 141K
代理商: ICS8344BYLFT
8344BY
www.icst.com/products/hiperclocks.html
REV. A FEBRUARY 19, 2002
13
Integrated
Circuit
Systems, Inc.
ICS8344
LOW SKEW, 1-TO-24
DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
APPLICATION INFORMATION
WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS
Figure 1 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF = V
DD/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit should be located as close as possible to the input pin. The ratio of
R1 and R2 might need to be adjusted to position the V_REF in the center of the input voltage swing. For example, if the input clock
swing is only 2.5V and V
DD = 3.3V, V_REF should be 1.25V and R2/R1 = 0.609.
FIGURE 1 - SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT
R2
1K
V
DD
CLK_IN
+
-
R1
1K
C1
0.1uF
V_REF
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