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参数资料
| 型号： | ICS83841BH |
| 元件分类： | 编、解码器及复用、解复用 |
| 英文描述： | 83841 SERIES, 20 LINE TO 40 LINE MULTIPLEXER, TRUE OUTPUT, PBGA72 |
| 封装： | 6 X 6 MM, 1.20 MM HEIGHT, MO-195, TFBGA-72 |
| 文件页数： | 4/8页 |
| 文件大小： | 121K |
| 代理商： | ICS83841BH |
83841BH
www.icst.com/products/hiperclocks.html
REV. A MARCH 10, 2006
4
Integrated
Circuit
Systems, Inc.
ICS83841
20 BIT, DDR SDRAM 2:1 MUX
t
PD
V
DD
2
V
DD
2
PARAMETER MEASUREMENT INFORMATION
OUTPUT SKEW
2.5V OUTPUT LOAD AC TEST CIRCUIT
BANK SKEW
tsk(o)
V
DD
2
V
DD
2
DAx,
DBx
DAy,
DBy
DHx
DAx/DBx
1.25V
2.5V
0V
VOH
VOL
Input
Output
Rising Edge
Skew
FallingEdge
Skew
1.25V
VOH - 0.15V
VOL
VOH
0V
2.5V
tPHZ →
tPZH →
Output DAx/DBx
(See Note)
S
(Low-level
enabling)
NOTE: The output is high except when disabled by the S control.
←
3-STATE OUTPUT ENABLE/DISABLE TIMES
RISING & FALLING EDGE SKEW
PROPAGATION DELAY
tsk(b)
V
DD
2
V
DD
2
DAx
DBx
V
DD = 1.25V ± 0.1V
-1.25V ± 0.1V
SCOPE
Qx
LVCMOS
V
DD
GND
This circuit is used for test purposes only,
not intended for application use.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS83841BHLF | 制造商:ICS 制造商全称:ICS 功能描述:20 BIT, DDR SDRAM 2:1 MUX |
| ICS83841BHLFT | 制造商:ICS 制造商全称:ICS 功能描述:20 BIT, DDR SDRAM 2:1 MUX |
| ICS83841BHT | 制造商:ICS 制造商全称:ICS 功能描述:20 BIT, DDR SDRAM 2:1 MUX |
| ICS83904-02 | 制造商:ICS 制造商全称:ICS 功能描述:LOW SKEW, 1-TO-4 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER |
| ICS83904AG-02 | 制造商:ICS 制造商全称:ICS 功能描述:LOW SKEW, 1-TO-4 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER |
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