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参数资料
| 型号： | ICS83940DYLF |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 14/16页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK BUFFER MUX 2:18 32-LQFP |
| 标准包装： | 250 |
| 系列： | HiPerClockS™ |
| 类型： | 扇出缓冲器（分配），多路复用器 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 2:18 |
| 差分 - 输入:输出： | 是/无 |
| 输入： | CML，LVCMOS，LVPECL，LVTTL，SSTL |
| 输出： | LVCMOS，LVTTL |
| 频率 - 最大： | 250MHz |
| 电源电压： | 2.375 V ~ 3.465 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-TQFP（7x7） |
| 包装： | 托盘 |
| 其它名称： | 800-1117 83940DYLF |
83940DY
www.idt.com
REV. B AUGUST 9, 2010
7
ICS83940D
LOW SKEW, 1-TO-18
LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER
ADDITIVE PHASE JITTER
Input/Output Additive Phase Jitter
at 155.52MHz = 0.03ps (typical)
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
1k
10k
100k
1M
10M
100M
The spectral purity in a band at a specific offset from the funda-
mental compared to the power of the fundamental is called the
dBc Phase Noise. This value is normally expressed using a
Phase noise plot and is most often the specified plot in many
applications. Phase noise is defined as the ratio of the noise
power present in a 1Hz band at a specified offset from the fun-
damental frequency to the power value of the fundamental. This
ratio is expressed in decibels (dBm) or a ratio of the power in
As with most timing specifications, phase noise measurements
have issues. The primary issue relates to the limitations of the
equipment. Often the noise floor of the equipment is higher than
the noise floor of the device. This is illustrated above. The de-
the 1Hz band to the power in the fundamental. When the re-
quired offset is specified, the phase noise is called a dBc value,
which simply means dBm at a specified offset from the funda-
mental. By investigating jitter in the frequency domain, we get a
better understanding of its effects on the desired application over
the entire time record of the signal. It is mathematically possible
to calculate an expected bit error rate given a phase noise plot.
vice meets the noise floor of what is shown, but can actually be
lower. The phase noise is dependant on the input source and
measurement equipment.
OFFSET FROM CARRIER FREQUENCY (HZ)
SSB
P
HASE
N
OISE
dBc
/H
Z
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS83940DYLFT | 功能描述:IC CLOCK BUFFER MUX 2:18 32-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:HiPerClockS™ 标准包装:74 系列:- 类型:扇出缓冲器（分配） 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 输入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 输出:HCSL，LVDS 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN（5x5） 包装:管件 |
| ICS83940DYT | 制造商:ICS 制造商全称:ICS 功能描述:LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER |
| ICS83940I-01 | 制造商:ICS 制造商全称:ICS 功能描述:LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER |
| ICS83947AI147 | 制造商:ICS 制造商全称:ICS 功能描述:LOW SKEW, 1-TO-9 LVCMOS/LVTTL FANOUT BUFFER |
| ICS83947AYI | 制造商:ICS 制造商全称:ICS 功能描述:LOW SKEW, 1-TO-9 LVCMOS FANOUT BUFFER |
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