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参数资料
| 型号： | ICS83940DYLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 83940 SERIES, LOW SKEW CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封装： | 7 X 7 MM, 1.40 MM HEIGHT, LEAD FREE, MS-026BBA, LQFP-32 |
| 文件页数： | 2/16页 |
| 文件大小： | 499K |
| 代理商： | ICS83940DYLFT |
83940DY
www.icst.com/products/hiperclocks.html
REV. B JUNE 15, 2004
10
Integrated
Circuit
Systems, Inc.
ICS83940D
LOW SKEW, 1-TO-18
LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER
APPLICATION INFORMATION
Figure 1 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
DD/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
FIGURE 1. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT
WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
DD = 3.3V, V_REF should be 1.25V
and R2/R1 = 0.609.
VDD
R2
1K
V_REF
C1
0.1u
R1
1K
Single Ended Clock Input
PCLK
nPCLK
ICS83940D
LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER
TSD
IDT / ICS LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER
ICS83940D
10
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS83940DYT | 制造商:ICS 制造商全称:ICS 功能描述:LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER |
| ICS83940I-01 | 制造商:ICS 制造商全称:ICS 功能描述:LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER |
| ICS83947AI147 | 制造商:ICS 制造商全称:ICS 功能描述:LOW SKEW, 1-TO-9 LVCMOS/LVTTL FANOUT BUFFER |
| ICS83947AYI | 制造商:ICS 制造商全称:ICS 功能描述:LOW SKEW, 1-TO-9 LVCMOS FANOUT BUFFER |
| ICS83947AYI-147 | 制造商:ICS 制造商全称:ICS 功能描述:LOW SKEW, 1-TO-9 LVCMOS/LVTTL FANOUT BUFFER |
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