参数资料
型号: ICS8422004AGI
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 226.66 MHz, OTHER CLOCK GENERATOR, PDSO24
封装: 4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24
文件页数: 14/14页
文件大小: 411K
代理商: ICS8422004AGI
8422004AGI
www.icst.com/products/hiperclocks.html
REV. B NOVEMBER 14, 2005
9
Integrated
Circuit
Systems, Inc.
ICS8422004I
FEMTOCLOCKSLVCMOS/CRYSTAL-TO-
LVHSTL FREQUENCY SYNTHESIZER
PRELIMINARY
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS8422004I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS8422004I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
DD = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX = VDD_MAX * IDD_MAX = 3.465V * 100mA = 346.5mW
Power (outputs)
MAX = 32.8mW/Loaded Output pair
If all outputs are loaded, the total power is 4 * 32.8mW = 131.2mW
Total Power
_MAX (3.465V, with all outputs switching) = 346.5mW + 131.2mW = 477.7mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming a
moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 65°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.478W * 65°C/W = 99.85°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 6. THERMAL RESISTANCE
θθθθθ
JA
FOR
24-PIN TSSOP, FORCED CONVECTION
θθθθθ
JA by Velocity (Meters per Second)
0
1
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
70°C/W
65°C/W
62°C/W
ICS8422004I
FEMTOCLOCKS LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER
TSD
IDT / ICS FEMTOCLOCKS LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER
ICS8422004I
9
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