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| 型号： | ICS843001AGI-22LFT |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 5/21页 |
| 文件大小： | 0K |
| 描述： | IC SYNTHESIZER LVPECL 24-TSSOP |
| 标准包装： | 2,500 |
| 系列： | HiPerClockS™, FemtoClock™ |
| 类型： | 频率合成器 |
| PLL： | 带旁路 |
| 输入： | LVCMOS，LVTTL，晶体 |
| 输出： | LVCMOS，LVPECL，LVTTL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 3:2 |
| 差分 - 输入:输出： | 无/是 |
| 频率 - 最大： | 640MHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 2.375 V ~ 3.63 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 24-TSSOP |
| 包装： | 带卷 (TR) |
| 其它名称： | 843001AGI-22LFT |
ICS843001AGI-22 REVISION B JUNE 25, 2009
13
2009 Integrated Device Technology, Inc.
ICS843001I-22 Data Sheet
FEMTOCLOCK CRYSTAL/LVCMOS-TO-3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
Recommendations for Unused Input and Output Pins
Inputs:
Crystal Inputs
For applications not requiring the use of the crystal oscillator input,
both XTAL_IN and XTAL_OUT can be left floating. Though not
required, but for additional protection, a 1k
resistor can be tied from
XTAL_IN to ground.
CLK Input
For applications not requiring the use of the clock input, it can be left
floating. Though not required, but for additional protection, a 1k
resistor can be tied from the CLK input to ground.
LVCMOS Control Pins
All control pins have internal pullups or pulldowns; additional
resistance is not required but can be added for additional protection.
A 1k
resistor can be used.
Outputs:
LVPECL Outputs
The unused LVPECL output pair can be left floating. We recommend
that there is no trace attached. Both sides of the differential output
pair should either be left floating or terminated.
LVCMOS Output
All unused LVCMOS output can be left floating. We recommend that
there is no trace attached.
Termination for 3.3V LVPECL Outputs
The clock layout topology shown below is a typical termination for
LVPECL outputs. The two different layouts mentioned are
recommended only as guidelines.
The differential outputs are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminating
resistors (DC current path to ground) or current sources must be
used for functionality. These outputs are designed to drive 50
transmission lines. Matched impedance techniques should be used
to maximize operating frequency and minimize signal distortion.
Figures 4A and 4B show two different layouts which are
recommended only as guidelines. Other suitable clock layouts may
exist and it would be recommended that the board designers simulate
to guarantee compatibility across all printed circuit and clock
component process variations.
Figure 4A. 3.3V LVPECL Output Termination
Figure 4B. 3.3V LVPECL Output Termination
3.3V
V
CC - 2V
R1
50
R2
50
RTT
Z
o = 50
Z
o = 50
+
_
RTT =
* Z
o
1
((V
OH + VOL) / (VCC – 2)) – 2
3.3V
LVPECL
Input
R1
84
R2
84
3.3V
R3
125
R4
125
Z
o = 50
Z
o = 50
LVPECL
Input
3.3V
+
_
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS843001AGI-22T | 制造商:ICS 制造商全称:ICS 功能描述:FEMTOCLOCKS? CRYSTAL/LVCMOS-TO-3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER |
| ICS843001AGI-23 | 制造商:ICS 制造商全称:ICS 功能描述:FEMTOCLOCKS⑩ CRYSTAL-TO-3.3V LVPECL/LVCMOS FREQUENCY SYNTHESIZER |
| ICS843001AGI-23LF | 功能描述:IC SYNTHESIZER LVPECL 24-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™, FemtoClock™ 标准包装:27 系列:Precision Edge® 类型:频率合成器 PLL:是 输入:PECL，晶体 输出:PECL 电路数:1 比率 - 输入:输出:1:1 差分 - 输入:输出:无/是 频率 - 最大:800MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 5.25 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC 包装:管件 |
| ICS843001AGI-23LFT | 功能描述:IC SYNTHESIZER LVPECL 24-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™, FemtoClock™ 标准包装:27 系列:Precision Edge® 类型:频率合成器 PLL:是 输入:PECL，晶体 输出:PECL 电路数:1 比率 - 输入:输出:1:1 差分 - 输入:输出:无/是 频率 - 最大:800MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 5.25 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC 包装:管件 |
| ICS843001AGI-23T | 制造商:ICS 制造商全称:ICS 功能描述:FEMTOCLOCKS⑩ CRYSTAL-TO-3.3V LVPECL/LVCMOS FREQUENCY SYNTHESIZER |
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