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| 型号： | ICS843002BKI-72LFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 122.88 MHz, OTHER CLOCK GENERATOR, QCC32 |
| 封装： | 5 X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD, VFQFN-32 |
| 文件页数： | 4/18页 |
| 文件大小： | 296K |
| 代理商： | ICS843002BKI-72LFT |
IDT / ICS WCDMA CLOCK GENERATOR/JITTER ATTENUATOR
12
ICS843002BKI-72 REV. A NOVEMBER 21, 2007
ICS843002I-72
FEMTOCLOCKS VCXO BASED WCDMA CLOCK GENERATOR/JITTER ATTENUATOR
VCXO-PLL EXTERNAL COMPONENTS
Choosing the correct external components and having a proper
printed circuit board (PCB) layout is a key task for quality
operation of the VCXO-PLL. In choosing a crystal, special
precaution must be taken with the package and load
capacitance (C
L
). In addition, frequency, accuracy and
temperature range must also be considered. Since the pulling
range of a cr ystal also va r ies with the package, it is
recommended that a metal-canned package like HC49 be used.
Generally, a metal-canned package has a larger pulling range
than a surface mounted device (SMD). For crystal selection
information, refer to the VCXO Crystal Selection Application
Note.
The crystal’s load capacitance C
L
characteristic determines its
resonating frequency and is closely related to the VCXO tuning
range. The total external capacitance seen by the crystal when
installed on a board is the sum of the stray board capacitance,
IC package lead capacitance, internal varactor capacitance and
any installed tuning capacitors (C
TUNE
).
If the crystal’s C
L
is greater than the total external capacitance,
the VCXO will oscillate at a higher frequency than the crystal
specification. If the crystal’s C
L
is lower than the total external
capacitance, the VCXO will oscillate at a lower frequency than
VCXO-PLL APPROXIMATE LOOP BANDWIDTH SELECTION TABLE
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CRYSTAL CHARACTERISTICS
VCXO CHARACTERISTICS TABLE
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the crystal specification. In either case, the absolute tuning
range is reduced. The correct value of C
L
is dependent on the
characteristics of the VCXO. The recommended C
L
in the Crystal
Parameter Table balances the tuning range by centering the
tuning curve.
The VCXO-PLL Loop Bandwidth Selection Table shows R
S
, C
S
and C
P
values for recommended high, mid and low loop
bandwidth configurations. The device has been characterized
using these parameters. For other configurations, refer to the
Loop Filter Component Selection for VCXO Based PLLs
Application Note.
The crystal and external loop
filter components should be
kept as close as possible to the
device. Loop filter and crystal
traces should be kept short and
separated from each other.
Other signal traces should be
kept separate and not r un
underneath the device, loop
filter or crystal components.
LF0
LF1
ISET
XTAL_IN
XTAL_OUT
RS
C
S
C
P
R
SET
C
TUNE
C
TUNE
19.2MHz
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS843002BY-31LF | 功能描述:IC SYNTHESIZER LVPECL 64-TQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™, FemtoClock™ 标准包装:27 系列:Precision Edge® 类型:频率合成器 PLL:是 输入:PECL，晶体 输出:PECL 电路数:1 比率 - 输入:输出:1:1 差分 - 输入:输出:无/是 频率 - 最大:800MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 5.25 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC 包装:管件 |
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| ICS843002CY31 | 制造商:ICS 制造商全称:ICS 功能描述:700MHZ FEMTOCLOCKS? VCXO BASED FREQUENCY TRANSLATOR AND JITTER ATTENUATOR |
| ICS843002CY-31 | 制造商:ICS 制造商全称:ICS 功能描述:700MHZ FEMTOCLOCKS? VCXO BASED FREQUENCY TRANSLATOR AND JITTER ATTENUATOR |
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