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参数资料
| 型号： | ICS843004AGI |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 226.66 MHz, OTHER CLOCK GENERATOR, PDSO24 |
| 封装： | 4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24 |
| 文件页数： | 15/16页 |
| 文件大小： | 452K |
| 代理商： | ICS843004AGI |
843004AGI
www.icst.com/products/hiperclocks.html
REV. A FEBRUARY 11, 2005
8
Integrated
Circuit
Systems, Inc.
ICS843004I
FEMTOCLOCKSCRYSTAL-TO-
3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
APPLICATION INFORMATION
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS843004I provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
CC, VCCA, and VCCO
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required.
Figure 1 illustrates how
a 10
resistor along with a 10F and a .01F bypass
capacitor should be connected to each V
CCA.
POWER SUPPLY FILTERING TECHNIQUES
FIGURE 1. POWER SUPPLY FILTERING
10
V
CCA
10
F
.01
F
3.3V or 2.5V
.01
F
V
CC
TERMINATION FOR 3.3V LVPECL OUTPUT
V
CC - 2V
50
50
RTT
Z
o = 50
Z
o = 50
FOUT
FIN
RTT =
Z
o
1
((V
OH + VOL) / (VCC – 2)) – 2
3.3V
125
125
84
84
Z
o = 50
Z
o = 50
FOUT
FIN
The clock layout topology shown below is a typical termi-
nation for LVPECL outputs. The two different layouts men-
tioned are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, ter-
minating resistors (DC current path to ground) or current
sources must be used for functionality. These outputs are
FIGURE 2B. LVPECL OUTPUT TERMINATION
FIGURE 2A. LVPECL OUTPUT TERMINATION
designed to drive 50
transmission lines. Matched imped-
ance techniques should be used to maximize operating
frequency and minimize signal distortion.
Figures 2A and
2B show two different layouts which are recommended
only as guidelines. Other suitable clock layouts may exist
and it would be recommended that the board designers
simulate to guarantee compatibility across all printed cir-
cuit and clock component process variations.
ICS843004I
FEMTOCLOCKS CRYSTAL/LVCMOS-TO-3.3V,2.5V LVPECL FREQUENCY SYNTHESIZER
TSD
IDT / ICS FEMTOCLOCKS CRYSTAL/LVCMOS-TO-3.3V,2.5V LVPECL FREQUENCY SYNTHESIZER
ICS843004I
8
相关PDF资料 |
PDF描述 |
|---|---|
| ICS843004AGILF | 226.66 MHz, OTHER CLOCK GENERATOR, PDSO24 |
| ICS843011AGLF | 113.33 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| ICS843011AM-01LF | 113.33 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| ICS843011AM-01 | 113.33 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| ICS843011CGLF | 113.33 MHz, OTHER CLOCK GENERATOR, PDSO8 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS843004AGI-01 | 制造商:Integrated Device Technology Inc 功能描述:IC SYNTHESIZER LVPECL 24TSSOP |
| ICS843004AGI-01LF | 功能描述:IC SYNTHESIZER LVPECL 24-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™, FemtoClock™ 标准包装:27 系列:Precision Edge® 类型:频率合成器 PLL:是 输入:PECL，晶体 输出:PECL 电路数:1 比率 - 输入:输出:1:1 差分 - 输入:输出:无/是 频率 - 最大:800MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 5.25 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC 包装:管件 |
| ICS843004AGI-01LFT | 功能描述:IC SYNTHESIZER LVPECL 24-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™, FemtoClock™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS843004AGI-01T | 制造商:Integrated Device Technology Inc 功能描述:IC SYNTHESIZER LVPECL 24TSSOP |
| ICS843004AGI-02LF | 功能描述:IC SYNTHESIZER LVPECL 24-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™, FemtoClock™ 标准包装:27 系列:Precision Edge® 类型:频率合成器 PLL:是 输入:PECL，晶体 输出:PECL 电路数:1 比率 - 输入:输出:1:1 差分 - 输入:输出:无/是 频率 - 最大:800MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 5.25 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC 包装:管件 |
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