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| 型号： | ICS843031AGLFT |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 12/14页 |
| 文件大小： | 0K |
| 描述： | IC CLK GENERATOR LVPECL 8-TSSOP |
| 标准包装： | 2,500 |
| 系列： | HiPerClockS™, FemtoClock™ |
| 类型： | 时钟/频率合成器，时钟发生器 |
| PLL： | 是 |
| 输入： | 晶体 |
| 输出： | LVPECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:1 |
| 差分 - 输入:输出： | 无/是 |
| 频率 - 最大： | 350MHz |
| 除法器/乘法器： | 是/是 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 8-TSSOP |
| 包装： | 带卷 (TR) |
| 其它名称： | 843031AGLFT |
CS843031AG REVISION A OCTOBER 5, 2011
7
2011 Integrated Device Technology, Inc.
ICS843031 Data Sheet
FEMTOCLOCK
CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
APPLICATION INFORMATION
Figure 1. CRYSTAL INPUt INTERFACE
CRYSTAL INPUT INTERFACE
The ICS843031 has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 1 below were determined using a 26.04167MHz, 18pF
parallel resonant crystal and were chosen to minimize the ppm
error. The optimum C1 and C2 values can be slightly adjusted
for different board layouts.
X1
18pF Parallel Cry stal
C1
12p
XTAL_OUT
XTAL_IN
C2
12p
TERMINATION FOR 3.3V LVPECL OUTPUT
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, termi-
nating resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed to
FIGURE 2B. LVPECL OUTPUT TERMINATION
FIGURE 2A. LVPECL OUTPUT TERMINATION
drive 50
Ω transmission lines.Matched impedance techniques
should be used to maximize operating frequency and mini-
mize signal distortion.
Figures 2A and 2B show two different
layouts which are recommended only as guidelines. Other suit-
able clock layouts may exist and it would be recommended
that the board designers simulate to guarantee compatibility
across all printed circuit and clock component process varia-
tions.
V
CC - 2V
50
Ω
50
Ω
RTT
Z
o = 50Ω
Z
o = 50Ω
FOUT
FIN
RTT =
Z
o
1
((V
OH + VOL) / (VCC – 2)) – 2
3.3V
125
Ω
125
Ω
84
Ω
84
Ω
Z
o = 50Ω
Z
o = 50Ω
FOUT
FIN
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS843031AGT | 制造商:ICS 制造商全称:ICS 功能描述:FEMTOCLOCKS⑩ CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR |
| ICS843034 | 制造商:ICS 制造商全称:ICS 功能描述:MULTI-RATE 3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER |
| ICS843034-01 | 制造商:ICS 制造商全称:ICS 功能描述:FEMTOCLOCKS? MULTI-RATE LVPECL FREQUENCY SYNTHESIZER |
| ICS843034A01 | 制造商:ICS 制造商全称:ICS 功能描述:FEMTOCLOCKS⑩ MULTI-RATE LVPECL FREQUENCY SYNTHESIZER |
| ICS843034AY | 制造商:ICS 制造商全称:ICS 功能描述:MULTI-RATE 3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER |
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