参数资料
型号: ICS843101IAG-100LFT
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 100 MHz, OTHER CLOCK GENERATOR, PDSO16
封装: 4.40 X 5 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-16
文件页数: 6/17页
文件大小: 435K
代理商: ICS843101IAG-100LFT
843101AGI-100
www.icst.com/products/hiperclocks.html
REV. A OCTOBER 20, 2005
14
Integrated
Circuit
Systems, Inc.
ICS843101I-100
FEMTOCLOCKS CRYSTAL-TO-LVPECL
100MHZ FREQUENCY MARGINING SYNTHESIZER
PRELIMINARY
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in Figure 5.
To calculate worst case power dissipation into the load, use the following equations which assume a 50
Ω load, and a termination
voltage of V
CCO
- 2V.
For logic high, V
OUT
= V
OH_MAX
= V
CCO_MAX
– 0.9V
(V
CCO_MAX
- V
OH_MAX
) = 0.9V
For logic low, V
OUT
= V
OL_MAX
= V
CCO_MAX
– 1.7V
(V
CCO_MAX
- V
OL_MAX
) = 1.7V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
OH_MAX
– (V
CCO_MAX
- 2V))/R
L
] * (V
CCO_MAX
- V
OH_MAX
) = [(2V - (V
CCO_MAX
- V
OH_MAX
))/R
L
] * (V
CCO_MAX
- V
OH_MAX
) =
[(2V - 0.9V)/50
Ω] * 0.9V = 19.8mW
Pd_L = [(V
OL_MAX
– (V
CCO_MAX
- 2V))/R
L
] * (V
CCO_MAX
- V
OL_MAX
) = [(2V - (V
CCO_MAX
- V
OL_MAX
))/R
L
] * (V
CCO_MAX
- V
OL_MAX
) =
[(2V - 1.7V)/50
Ω] * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW
FIGURE 5. LVPECL DRIVER CIRCUIT AND TERMINATION
Q1
V
OUT
V
CCO
RL
50
V
CCO - 2V
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