参数资料
型号: ICS843156AKILF
厂商: IDT, Integrated Device Technology Inc
文件页数: 6/20页
文件大小: 0K
描述: IC CLK GENERATOR 32VFQFP
标准包装: 490
系列: HiPerClockS™
类型: 时钟/频率合成器
PLL: 带旁路
输入: 晶体
输出: LVPECL
电路数: 1
比率 - 输入:输出: 1:10
差分 - 输入:输出: 无/是
频率 - 最大: 156.25MHz
除法器/乘法器: 是/无
电源电压: 2.375 V ~ 3.465 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-VFQFPN 裸露焊盘(4x4)
包装: 托盘
ICS843156AKI REVISION B NOVEMBER 28, 2012
14
2012 Integrated Device Technology, Inc.
ICS843156I Data Sheet
CRYSTAL-TO-LVPECL CLOCK SYNTHESIZER
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS843156I.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS843156I is the sum of the core power plus the power dissipation in the load(s).
The following is the power dissipation for VCCO = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipation in the load.
Power (core)MAX = VCCO_MAX * IEE_MAX = 3.465V * 179mA = 620.235mW
Power (outputs)MAX = 30mW/Loaded Output pair
If all outputs are loaded, the total power is 10 * 30mW = 300mW
Total Power_MAX (3.3V, with all outputs switching) = 620.235mW + 300mW = 920.235mW
2. Junction Temperature.
unction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
JA * Pd_total + TA
Tj = Junction Temperature
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
JA must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 37°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.920W * 37°C/W = 119.6°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 7. Thermal Resistance JA for 32 Lead VFQFN, Forced Convection
JA by Velocity
Meters per Second
01
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
37.0°C/W
32.4°C/W
29.0°C/W
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