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参数资料
| 型号： | ICS8431AM-11LFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 400 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| 封装： | SOIC-28 |
| 文件页数： | 2/7页 |
| 文件大小： | 97K |
| 代理商： | ICS8431AM-11LFT |
Integrated
Circuit
Systems, Inc.
8431-11
www.icst.com
REV. A - SEPTEMBER 25, 2000
2
ICS8431-11
CLOCK SYNTHESIZER
PRELIMINARY
FUNCTIONAL DESCRIPTION
The ICS8431-11 features a fully integrated PLL and therefore requires no external components for setting the loop bandwidth. A
16MHz series-resonant , fundamental crystal is used as the input to the on-chip oscillator. The output of the oscillator is divided by
16 prior to the phase detector. With a 16MHz crystal this provides a 1MHz reference frequency. The VCO of the PLL operates over
a range of 280 to 400MHz. The output of the loop divider is also applied to the phase detector.
The phase detector and the loop filter force the VCO output frequency to be M times the reference frequency by adjusting the
VCO control voltage. Note that for some values of M (either too high or too low) the PLL will not achieve lock. The output of the
VCO is scaled by a divider prior to being sent to the LVPECL output buffer. The divider provides a 50% output duty cycle.
The programmable features of the ICS8431-11 support four output operational modes and a programmable PLL loop divider.
The four output operational modes are spread spectrum clocking (SSC), non-spread spectrum clock and two test modes and
are controlled by the Power Up Latch. After power up the latch is disabled and the initial programmed values can only be
overwritten by removing all power to the device or by asserting the master reset input, MR. A HIGH-to-LOW transition on MR
latches new data into the Power Up Latch.
Programming the Spread Spectrum Clocking (SSC) feature is accomplished by configuring the internal Power Up Latch. The
input to this latch is encoded by the SSC_CTL[1:0] pins which define all functional states after power is applied. Figure 1
shows the timing relationship of the latched SSC_CTL[1:0] in relationship to the PLL power-on condition.
Approximately 100s after power is applied or a HIGH-to-LOW transistion on MR, the control bits SSC_CTL0 and SSC_CTL1
are latched. TPUL_SU is the time during which the data on the control bits is required to be valid before being latched.
TPUL_HD is the time after the data is latched that the control bits are required to remain valid. The configuration latch can be
overwritten by removing the power or by asserting MR and applying data to the inputs that meet the setup and hold time
requirment during power-on or of the master rest input. The power-on setup and hold time requirements are defined in Figure
1. Table 3A, Control Input Function Table defined the valid commands for SSC_CTL[1:0] lines.
The PLL loop divider or M divider is programmed by using inputs M0 through M8. Normally upon system power-up the nP_LOAD
input is held LOW until sometime after power becomes valid. On the LOW-to-HIGH transistion of nP_LOAD, the values
present at M[8:0] are captured. The relationship between the VCO frequency, the crystal frequency and the loop counter/
divider is defined as follows:
The M count and the required values of M0:M8 for programming the VCO are shown in Table 3B, Programmable VCO Frequency
Function Table. The frequency out is defined as follows:
For the ICS8431-11 N equals 2. Valid M values for which the PLL will achieve lock are defined as 280
≤ M ≤ 400.
16
M
fVCO =
fxtal x
FIGURE 1. POWER-UP CONFIGURATION TIMING
t = 100s
TPUL_SU
TPUL_HD
Data Valid
VDD = 0V
VDD = 3.3V
VDD Power On
SSC_CTL[1:0]
N
fout =
fVCO
=
16
M
fxtal x
N
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS8431AM-21 | 制造商:ICS 制造商全称:ICS 功能描述:350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| ICS8431AM-21LF | 功能描述:IC SYNTHESIZER GP LVPECL 28-SOIC RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:Precision Edge® 类型:时钟/频率合成器 PLL:无 输入:CML，PECL 输出:CML 电路数:1 比率 - 输入:输出:2:1 差分 - 输入:输出:是/是 频率 - 最大:10.7GHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-VFQFN 裸露焊盘，16-MLF? 供应商设备封装:16-MLF?（3x3） 包装:带卷 (TR) 其它名称:SY58052UMGTRSY58052UMGTR-ND |
| ICS8431AM-21LFT | 功能描述:IC SYNTHESIZER 350MHZ 28-SOIC RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS8431AM-21T | 制造商:ICS 制造商全称:ICS 功能描述:350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| ICS8431AMI-21 | 制造商:ICS 制造商全称:ICS 功能描述:350MHZ, LOW JITTER, CRYSTAL OSCILLATOR-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
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