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参数资料
| 型号： | ICS84324DM |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 125 MHz, OTHER CLOCK GENERATOR, PDSO24 |
| 封装： | 0.300 INCH, MS-013, MO-119, SOIC-24 |
| 文件页数： | 2/13页 |
| 文件大小： | 783K |
| 代理商： | ICS84324DM |
84324DM
www.icst.com/products/hiperclocks.html
REV. A JANUARY 30, 2003
10
Integrated
Circuit
Systems, Inc.
ICS84324
CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER WITH FANOUT BUFFER
PRELIMINARY
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in
Figure 5.
To calculate worst case power dissipation into the load, use the following equations which assume a 50
load, and a termination
voltage of V
CC
- 2V.
For logic high, V
OUT
= V
OH_MAX
= V
CC_MAX
– 1.0V
(V
CC_MAX
- V
OH_MAX
) = 1.0V
For logic low, V
OUT
= V
OL_MAX
= V
CC_MAX
– 1.7V
(V
CC_MAX
- V
OL_MAX
) = 1.7V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
OH_MAX
– (V
CC_MAX
- 2V))/R
L
] * (V
CC_MAX
- V
OH_MAX
) = [(2V - (V
CC_MAX
- V
OH_MAX
))/R
L
] * (V
CC_MAX
- V
OH_MAX
) =
[(2V - 1V)/50
) * 1V = 20.0mW
Pd_L = [(V
OL_MAX
– (V
CC_MAX
- 2V))/R
L
] * (V
CC_MAX
- V
OL_MAX
) = [(2V - (V
CC_MAX
- V
OL_MAX
))/R
L
] * (V
CC_MAX
- V
OL_MAX
) =
[(2V - 1.7V)/50
) * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30.2mW
FIGURE 5. LVPECL DRIVER CIRCUIT AND TERMINATION
Q1
V
OUT
V
CC
RL
50
V
CC - 2V
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS84324EM | 制造商:ICS 制造商全称:ICS 功能描述:CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER WITH FANOUT BUFFER |
| ICS84324EMT | 制造商:ICS 制造商全称:ICS 功能描述:CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER WITH FANOUT BUFFER |
| ICS84325 | 制造商:ICS 制造商全称:ICS 功能描述:CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER WITH FANOUT BUFFER |
| ICS8432-51 | 制造商:ICS 制造商全称:ICS 功能描述:700MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER |
| ICS843251-04 | 制造商:ICS 制造商全称:ICS 功能描述:FEMTOCLOCKS⑩ CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR |
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