- 您现在的位置：买卖IC网 > PDF目录239729 > ICS84325EM 250 MHz, OTHER CLOCK GENERATOR, PDSO24 PDF资料下载
参数资料
| 型号： | ICS84325EM |
| 元件分类： | XO, clock |
| 英文描述： | 250 MHz, OTHER CLOCK GENERATOR, PDSO24 |
| 封装： | 15.33 X 7.50 MM, 2.30 MM HEIGHT, MS-013, MO-119, SOIC-24 |
| 文件页数： | 13/15页 |
| 文件大小： | 275K |
| 代理商： | ICS84325EM |
84325EM
www.icst.com/products/hiperclocks.html
REV. B OCTOBER 11, 2004
7
Integrated
Circuit
Systems, Inc.
ICS84325
CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER WITH FANOUT BUFFER
APPLICATION INFORMATION
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS84325 provides sepa-
rate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
CC, VCCA and VCCO
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required.
Figure 2 illustrates how
a 24
resistor along with a 10F and a .01F bypass
capacitor should be connected to each V
CCA pin.
POWER SUPPLY FILTERING TECHNIQUES
FIGURE 2. POWER SUPPLY FILTERING
24
V
CCA
10
F
.01
F
3.3V
.01
F
V
CC
V
CC - 2V
50
50
RTT
Z
o = 50
Z
o = 50
FOUT
FIN
RTT =
Z
o
1
((V
OH + VOL) / (VCC – 2)) – 2
3.3V
125
125
84
84
Z
o = 50
Z
o = 50
FOUT
FIN
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs.Therefore, terminat-
ing resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed to
FIGURE 3B. LVPECL OUTPUT TERMINATION
FIGURE 3A. LVPECL OUTPUT TERMINATION
drive 50
transmission lines. Matched impedance techniques
should be used to maximize operating frequency and minimize
signal distortion.
Figures 3A and 3B show two different layouts
which are recommended only as guidelines. Other suitable clock
layouts may exist and it would be recommended that the board
designers simulate to guarantee compatibility across all printed
circuit and clock component process variations.
TERMINATION FOR LVPECL OUTPUTS
相关PDF资料 |
PDF描述 |
|---|---|
| ICS84427BM | 625 MHz, OTHER CLOCK GENERATOR, PDSO24 |
| ICS601G-21IT | 220 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| IBM25PPC405GPR3DB266Z | 32-BIT, 266 MHz, RISC PROCESSOR, PBGA456 |
| ICS950219YFLF-T | 200.4 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| IBM25PPC750GXEBB2532T | 32-BIT, 800 MHz, RISC PROCESSOR, CBGA292 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS84325EMLN | 制造商:ICS 制造商全称:ICS 功能描述:CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER WITH FANOUT BUFFER |
| ICS84325EMLNT | 制造商:ICS 制造商全称:ICS 功能描述:CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER WITH FANOUT BUFFER |
| ICS84325EMT | 制造商:ICS 制造商全称:ICS 功能描述:CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER WITH FANOUT BUFFER |
| ICS84326 | 制造商:ICS 制造商全称:ICS 功能描述:CRYSTAL-TO-3.3V LVPECL SERIAL ATTACHED SCSI CLOCK SYNTHESIZER/FANOUT BUFFER |
| ICS84326AM | 制造商:ICS 制造商全称:ICS 功能描述:CRYSTAL-TO-3.3V LVPECL SERIAL ATTACHED SCSI CLOCK SYNTHESIZER/FANOUT BUFFER |
发布紧急采购，3分钟左右您将得到回复。