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参数资料
| 型号： | ICS8432CY-111LF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 8432 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封装： | 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32 |
| 文件页数： | 1/17页 |
| 文件大小： | 144K |
| 代理商： | ICS8432CY-111LF |
8432CY-111
www.icst.com/products/hiperclocks.html
REV. C APRIL 12, 2007
1
Integrated
Circuit
Systems, Inc.
ICS8432-111
700MHZ/350MHZ
DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS8432-111 is a general purpose, dual out-
put Differential-to-3.3V LVPECL High Frequency
Synthesizer and a member of the HiPerClockS
family of High Performance Clocks Solutions
from ICS. The ICS8432-111 has a selectable
differential CLK, nCLK pair or LVCMOS/LVTTL TEST_CLK.The
TEST_CLK input accepts LVCMOS or LVTTL input levels
and translates them to 3.3V LVPECL levels. The CLK, nCLK
pair can accept most standard differential input levels.The
VCO operates at a frequency range of 200MHz to 700MHz.
The VCO frequency is programmed in steps equal to the value
of the input differential or single ended reference frequency.
Output frequencies up to 700MHz for FOUT and 350MHz for
FOUT/2 can be programmed using the serial or parallel
interfaces to the configuration logic. The low phase noise
characteristics and the multiple frequency outputs of the
ICS8432-111 makes it an ideal clock source for Fibre Channel
1 and 2, and Infiniband applications.
BLOCK DIAGRAM
PIN ASSIGNMENT
FEATURES
Dual differential 3.3V LVPECL outputs
Selectable differential CLK, nCLK pair or LVCMOS TEST_CLK
CLK, nCLK pair can accept the following differential input
levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
TEST_CLK can accept the following input types:
LVCMOS or LVTTL
Maximum FOUT frequency: 700MHz
Maximum FOUT/2 frequency: 350MHz
CLK, nCLK or TEST_CLK input frequency: 40MHz
VCO range: 250MHz to 700MHz
Parallel or serial interface for programming counter
and VCO frequency multiplier and dividers
RMS period jitter: 5ps (maximum)
Cycle-to-cycle jitter: 40ps (maximum)
3.3V supply voltage
0°C to 70°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free
(RoHS 6) packages
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
VCO_SEL
CLK_SEL
TEST_CLK
CLK
S_LOAD
S_DATA
S_CLOCK
nP_LOAD
M0:M8
N0:N1
VCO
PLL
FOUT
nFOUT
FOUT/2
nFOUT/2
TEST
CONFIGURATION
INTERFACE
LOGIC
÷M
0
1
0
1
PHASE DETECTOR
÷1
÷2
÷4
÷8
÷2
32 31 30 29 28 27 26 25
9
10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
CLK
TEST_CLK
CLK_SEL
VCCA
S_LOAD
S_DATA
S_CLOCK
MR
M5
M6
M7
M8
N0
N1
nc
VEE
V
EE
nFOUT
FOUT
V
CCO
nFOUT/2
FOUT/2
V
CC
TEST
nCLK
nP_LOAD
VCO_SEL
M0
M1
M2
M3
M4
ICS8432-111
nCLK
MR
HiPerClockS
ICS
相关PDF资料 |
PDF描述 |
|---|---|
| ICS8432CY-111 | 8432 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| ICS8432CYI-01T | 700 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| ICS8432DY-101LFT | 8432 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| ICS8432DY-101T | 8432 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| ICS8432DY-101LF | 8432 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS8432CY-111LFT | 功能描述:IC SYNTHESIZER 700/350MHZ 32LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS8432CY-111T | 制造商:ICS 制造商全称:ICS 功能描述:700MHZ/350MHZ DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| ICS8432DI-101 | 制造商:ICS 制造商全称:ICS 功能描述:700MHZ, DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| ICS8432DY101 | 制造商:ICS 功能描述: |
| ICS8432DY-101 | 制造商:ICS 功能描述: |
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