参数资料
型号: ICS84330CVIT
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: XO, clock
英文描述: 720 MHz, OTHER CLOCK GENERATOR, PQCC28
封装: 11.60 X 11.40 MM, 4.10 MM HEIGHT, PLASTIC, MS-018, LCC-28
文件页数: 6/20页
文件大小: 503K
代理商: ICS84330CVIT
84330CVI
www.icst.com/products/hiperclocks.html
REV. A DECEMBER 7, 2004
14
Integrated
Circuit
Systems, Inc.
ICS84330CI
720MHZ, LOW JITTER, CRYSTAL-TO-3.3V
DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in the
Figure 8.
To calculate worst case power dissipation into the load, use the following equations which assume a 50
load, and a termination
voltage of V
CC
- 2V.
For logic high, V
OUT
= V
OH_MAX
= V
CC_MAX
– 0.9V
(V
CC_MAX
- V
OH_MAX
) = 0.9V
For logic low, V
OUT
= V
OL_MAX
= V
CC_MAX
– 1.7V
(V
CC_MAX
- V
OL_MAX
) = 1.7V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
OH_MAX
– (V
CC_MAX
- 2V))/R
L
] * (V
CC_MAX
- V
OH_MAX
) = [(2V - (V
CC_MAX
- V
OH_MAX
))/R
L
] * (V
CC_MAX
- V
OH_MAX
) =
[(2V - 0.9V)/50
] * 0.9V = 19.8mW
Pd_L = [(V
OL_MAX
– (V
CC_MAX
- 2V))/R
L
] * (V
CC_MAX
- V
OL_MAX
) = [(2V - (V
CC_MAX
- V
OL_MAX
))/R
L
] * (V
CC_MAX
- V
OL_MAX
) =
[(2V - 1.7V)/50
] * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW
FIGURE 8. LVPECL DRIVER CIRCUIT AND TERMINATION
Q1
V
OUT
V
CC
RL
50
V
CC - 2V
ICS84330CI
720MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
TSD
IDT / ICS 720MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
ICS84330CI
14
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