参数资料
型号: ICS84330CY
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 700 MHz, OTHER CLOCK GENERATOR, PQFP32
封装: 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBA, LQFP-32
文件页数: 19/19页
文件大小: 292K
代理商: ICS84330CY
84330CV
www.icst.com/products/hiperclocks.html
REV. C APRIL 10, 2007
9
Integrated
Circuit
Systems, Inc.
ICS84330C
700MHZ, LOW JITTER, CRYSTAL-TO-3.3V
DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
50
40
30
20
10
0
200
300
600
700
400
500
Output Frequency (MHz)
Cyc
le-to-Cyc
le
Jitter
(ps)
N = 1
Spec Limit
LVCMOS TO XTAL INTERFACE
The XTAL1 input can accept single ended LVCMOS signal
through an AC couple capacitor. A general interface diagram
is shown in Figure 4. The XTAL2 input can be left floating. The
edge rate can be as slow as 10ns. If the incoming signal has
sharp edge rate and the signal path is a long trace, proper
termination for the driver and controlled characteristic imped-
Crystal Input Interface
XTAL1
XTAL2
C1
0.1uF
Q1
LVCMOS_Driver
VDD
FIGURE 4. GENERAL DIAGRAM FOR LVCMOS DRIVER TO XTAL INPUT INTERFACE
ance trace may be required. The input can function with half
swing amplitude. Reducing amplitude from full swing of 3.3V
to half swing of about 1.65V can prevent signal interfere with
power rail and may reduce noise. Please refer to the LVCMOS
driver data sheet and application note for amplitude reduction
and termination approach.
FIGURE 5. CYCLE-TO-CYCLE JITTER VS. fOUT (using a 16MHz XTAL)
相关PDF资料
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