参数资料
型号: ICS843321AGI-12LF
厂商: IDT, Integrated Device Technology Inc
文件页数: 2/14页
文件大小: 0K
描述: IC SYNTHESIZER CLK SONET 8TSSOP
标准包装: 96
系列: HiPerClockS™, FemtoClock™
类型: 时钟发生器
PLL:
输入: 晶体
输出: LVPECL
电路数: 1
比率 - 输入:输出: 1:1
差分 - 输入:输出: 无/是
频率 - 最大: 622.08MHz
除法器/乘法器: 是/无
电源电压: 2.375 V ~ 3.465 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 8-TSSOP
包装: 管件
ICS843321I-12
FEMTOCLOCKCRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
IDT / ICS 3.3V, 2.5V LVPECL CLOCK GENERATOR
10
ICS843321AGI-12 REV. A FEBRUARY 27, 2009
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS843321I-12.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS843321I-12 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 83mA = 287.60mW
Power (outputs)MAX = 30mW/Loaded Output pair
Total Power_MAX (3.3V, with all outputs switching) = 287.60mW + 30mW = 317.60mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device.
The maximum recommended junction temperature for HiPerClockS devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming a moderate
air flow of 1 meter per second and a multi-layer board, the appropriate value is 125.5°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.318W * 125.5°C/W = 124.9°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type
of board (multi-layer).
Table 6. Thermal Resistance θJA for 8 Lead TSSOP, Forced Convection
θ
JA vs. Air Flow
Meters per Second
01
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
129.5°C/W
125.5°C/W
123.5°C/W
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