参数资料
型号: ICS844002AGI-01LF
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 170 MHz, OTHER CLOCK GENERATOR, PDSO20
封装: 6.50 X 4.40 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-20
文件页数: 12/14页
文件大小: 1855K
代理商: ICS844002AGI-01LF
ICS844002I-01
FEMTOCLOCKS CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER
IDT / ICS LVDS FREQUENCY SYNTHESIZER
7
ICS844002AGI-01 REV. C SEPTEMBER 28, 2007
Parameter Measurement Information, continued
Differential Offset Voltage Setup
Application Information
Power Supply Filtering Technique
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. The ICS844002I-01 provides separate
power supplies to isolate any high switching noise from the outputs
to the internal PLL. VDD, VDDA and VDDO should be individually
connected to the power supply plane through vias, and bypass
capacitors should be used for each pin. To achieve optimum jitter
performance, power supply isolation is required. Figure 1
illustrates how a 10
resistor along with a 10F and a 0.01F
bypass capacitor should be connected to each VDDA pin.
Figure 1. Power Supply Filtering
Recommendations for Unused Input and Output Pins
Inputs:
LVCMOS Control Pins
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
resistor can be used.
REF_CLK INPUT
For applications not requiring the use of the reference clock,
it can be left floating. Though not required, but for additional
protection, a 1k
resistor can be tied from the REF_CLK to
ground.
Crystal Inputs
For applications not requiring the use of the crystal oscillator input,
both XTAL_IN and XTAL_OUT can be left floating. Though not
required, but for additional protection, a 1k
resistor can be tied
from XTAL_IN to ground.
Outputs:
LVDS Outputs
All unused LVDS output pairs can be either left floating or
terminated with 100
across. If they are left floating, we
recommend that there is no trace attached.
100
out
LVDS
DC Input
VOD/ VOD
V
DD
VDD
VDDA
2.5V
10
10F
.01F
相关PDF资料
PDF描述
ICS844002AGLF 226.66 MHz, OTHER CLOCK GENERATOR, PDSO20
ICS844003AGILFT 700 MHz, OTHER CLOCK GENERATOR, PDSO24
ICS844003AGLFT 700 MHz, OTHER CLOCK GENERATOR, PDSO24
ICS844003BGI-01LFT 680 MHz, OTHER CLOCK GENERATOR, PDSO24
ICS844003BGI-01LF 680 MHz, OTHER CLOCK GENERATOR, PDSO24
相关代理商/技术参数
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ICS844002AGI-01LFT 功能描述:IC SYNTHESIZER 2LVDS 20-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器,PLL,频率合成器 系列:HiPerClockS™, FemtoClock™ 标准包装:1,000 系列:- 类型:时钟/频率合成器,扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP(8x8) 包装:带卷 (TR) 其它名称:844S012AKI-01LFT
ICS844002AGILF 功能描述:IC SYNTHESIZER 2LVDS 20-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器,PLL,频率合成器 系列:HiPerClockS™, FemtoClock™ 标准包装:27 系列:Precision Edge® 类型:频率合成器 PLL:是 输入:PECL,晶体 输出:PECL 电路数:1 比率 - 输入:输出:1:1 差分 - 输入:输出:无/是 频率 - 最大:800MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 5.25 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:28-SOIC(0.295",7.50mm 宽) 供应商设备封装:28-SOIC 包装:管件
ICS844002AGILFT 功能描述:IC SYNTHESIZER 2LVDS 20-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器,PLL,频率合成器 系列:HiPerClockS™, FemtoClock™ 标准包装:1,000 系列:- 类型:时钟/频率合成器,扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP(8x8) 包装:带卷 (TR) 其它名称:844S012AKI-01LFT
ICS844002AGLF 功能描述:IC SYNTHESIZER 2LVDS 20-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器,PLL,频率合成器 系列:HiPerClockS™, FemtoClock™ 标准包装:1,000 系列:- 类型:时钟/频率合成器,扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP(8x8) 包装:带卷 (TR) 其它名称:844S012AKI-01LFT
ICS844002AGLFT 功能描述:IC SYNTHESIZER 2LVDS 20-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器,PLL,频率合成器 系列:HiPerClockS™, FemtoClock™ 标准包装:1,000 系列:- 类型:时钟/频率合成器,扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP(8x8) 包装:带卷 (TR) 其它名称:844S012AKI-01LFT