- 您现在的位置：买卖IC网 > PDF目录67693 > ICS844246BGLFT (INTEGRATED DEVICE TECHNOLOGY INC) 333.3333 MHz, OTHER CLOCK GENERATOR, PDSO24 PDF资料下载
参数资料
| 型号： | ICS844246BGLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 333.3333 MHz, OTHER CLOCK GENERATOR, PDSO24 |
| 封装： | 4.40 X 7.80 MM, 0.90 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-24 |
| 文件页数： | 16/16页 |
| 文件大小： | 977K |
| 代理商： | ICS844246BGLFT |
IDT / ICS LVDS FREQUENCY SYNTHESIZER W/FANOUT BUFFER
9
ICS844246BG REV.C NOVEMBER 14, 2007
ICS844246
FEMTOCLOCKS CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
PRELIMINARY
FIGURE 1. POWER SUPPLY FILTERING
10
Ω
V
DDA
10
μF
.01
μF
3.3V
.01
μF
V
DD
APPLICATION INFORMATION
CRYSTAL INPUT INTERFACE
The ICS844246 has been characterized with 18pF parallel
resonant crystals. The capacitor values shown in Figure 2
FIGURE 2. CRYSTAL INPUt INTERFACE
below were deter mined using an 18pF parallel resonant
crystal and were chosen to minimize the ppm error.
C1
22p
X1
18pF Parallel Crystal
C2
22p
XTAL_OUT
XTAL_IN
INPUTS:
LVCMOS CONTROL PINS
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
Ω resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVDS Outputs
All unused LVDS output pairs can be either left floating or
terminated with 100
Ω across. If they are left floating, we
recommend that there is no trace attached.
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter perfor-
mance, power supply isolation is required. The ICS844246 pro-
vides separate power supplies to isolate any high switching noise
from the outputs to the internal PLL. V
DD, VDDA, and VDDO should
be individually connected to the power supply plane through vias,
and 0.01F bypass capacitors should be used for each pin. Fig-
ure 1 illustrates this for a generic V
CC pin and also shows that
V
DDA requires that an additional10Ω resistor along with a 10F
bypass capacitor be connected to the V
DDA pin.
相关PDF资料 |
PDF描述 |
|---|---|
| ICS844246BG | 333.3333 MHz, OTHER CLOCK GENERATOR, PDSO24 |
| ICS844251BGI-15LFT | 750 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| ICS844251BGI-15LFT | 750 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| ICS844251BGI-15 | 750 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| ICS844252AG-04 | 187.5 MHz, OTHER CLOCK GENERATOR, PDSO16 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS844246DGLF | 功能描述:IC SYNTHESIZER/BUFFER 24TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™, FemtoClock™ 标准包装:27 系列:Precision Edge® 类型:频率合成器 PLL:是 输入:PECL，晶体 输出:PECL 电路数:1 比率 - 输入:输出:1:1 差分 - 输入:输出:无/是 频率 - 最大:800MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 5.25 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC 包装:管件 |
| ICS844246DGLFT | 功能描述:IC SYNTHESIZER/BUFFER 24TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™, FemtoClock™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS844251BG-14LF | 功能描述:IC CLOCK GENERATOR ETH 8TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™, FemtoClock™ 标准包装:27 系列:Precision Edge® 类型:频率合成器 PLL:是 输入:PECL，晶体 输出:PECL 电路数:1 比率 - 输入:输出:1:1 差分 - 输入:输出:无/是 频率 - 最大:800MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 5.25 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC 包装:管件 |
| ICS844251BG-14LFT | 功能描述:IC CLOCK GENERATOR ETH 8TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™, FemtoClock™ 标准包装:27 系列:Precision Edge® 类型:频率合成器 PLL:是 输入:PECL，晶体 输出:PECL 电路数:1 比率 - 输入:输出:1:1 差分 - 输入:输出:无/是 频率 - 最大:800MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 5.25 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC 包装:管件 |
| ICS844251BGI-14LF | 制造商:Integrated Device Technology Inc 功能描述:IC SYNTHESIZER LVDS 8TSSOP |
发布紧急采购，3分钟左右您将得到回复。