参数资料
型号: ICS8530DYLF
厂商: IDT, Integrated Device Technology Inc
文件页数: 2/16页
文件大小: 0K
描述: IC CLK BUFF 1:16 500MHZ 48-LQFP
标准包装: 250
系列: HiPerClockS™
类型: 扇出缓冲器(分配)
电路数: 1
比率 - 输入:输出: 1:16
差分 - 输入:输出: 是/是
输入: HCSL,LVDS,LVHSTL,LVPECL,SSTL
输出: LVPECL
频率 - 最大: 500MHz
电源电压: 2.375 V ~ 3.465 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-TQFP(7x7)
包装: 托盘
其它名称: 8530DYLF
ICS8530DY REVISION E SEPTEMBER 15, 2010
10
2010 Integrated Device Technology, Inc.
ICS8530 Data Sheet
LOW SKEW, 1-TO-16, DIFFERENTIAL-TO-2.5V LVPECL FANOUT BUFFER
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS8530.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS8530 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 115mA = 398.5mW
Power (outputs)MAX = 35mW/Loaded Output pair
If all outputs are loaded, the total power is 16 * 35mW = 560mW
Total Power_MAX (3.465V, with all outputs switching) = 398.5mW + 560mW = 958mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and it directly affects the reliability of the device.
The maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the
bond wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming a moderate air
flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 42.1°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.958W * 42.1°C/W = 110.3°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance θJA for 48 Lead LQFP, Forced Convection
θ
JA by Velocity
Linear Feet per Minute
0200
500
Single-Layer PCB, JEDEC Standard Test Boards
67.8°C/W
55.9°C/W
50.1°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
47.9°C/W
42.1°C/W
39.4°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
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