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| 型号： | ICS8531AY-01LF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 8531 SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封装： | 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32 |
| 文件页数： | 15/18页 |
| 文件大小： | 297K |
| 代理商： | ICS8531AY-01LF |
IDT / ICS 1-TO-9, 3.3V LVPECL FANOUT BUFFER
6
ICS8531AY-01 REV. F APRIL 11, 2007
ICS8531-01
LOW SKEW, 1-TO-9, DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
ADDITIVE PHASE JITTER
The spectral purity in a band at a specific offset from the
fundamental compared to the power of the fundamental is called
the dBc Phase Noise. This value is normally expressed using a
Phase noise plot and is most often the specified plot in many
applications. Phase noise is defined as the ratio of the noise power
present in a 1Hz band at a specified offset from the fundamental
frequency to the power value of the fundamental. This ratio is
expressed in decibels (dBm) or a ratio of the power in the 1Hz
As with most timing specifications, phase noise measurements
have issues. The primary issue relates to the limitations of the
equipment. Often the noise floor of the equipment is higher than
the noise floor of the device. This is illustrated above. The device
band to the power in the fundamental. When the required offset
is specified, the phase noise is called a dBc value, which simply
means dBm at a specified offset from the fundamental. By
investigating jitter in the frequency domain, we get a better
understanding of its effects on the desired application over the
entire time record of the signal. It is mathematically possible to
calculate an expected bit error rate given a phase noise plot.
meets the noise floor of what is shown, but can actually be lower.
The phase noise is dependant on the input source and
measurement equipment.
OFFSET FROM CARRIER FREQUENCY (HZ)
SSB
P
HASE
N
OISE
dB
c
/H
Z
Additive Phase Jitter @
155.52MHz (12kHz to 20MHz)
= 0.17ps typical
相关PDF资料 |
PDF描述 |
|---|---|
| ICS8531AY-01 | LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| ICS8532AY-01LF | LOW SKEW CLOCK DRIVER, 17 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
| ICS8532BY-01T | 8532 SERIES, LOW SKEW CLOCK DRIVER, 16 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
| ICS8532BY-01LF | 8532 SERIES, LOW SKEW CLOCK DRIVER, 16 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
| ICS8532BY-01LF | 8532 SERIES, LOW SKEW CLOCK DRIVER, 16 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
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| ICS8531AY-01T | 功能描述:IC CLOCK BUFFER MUX 2:9 32-LQFP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:HiPerClockS™ 标准包装:74 系列:- 类型:扇出缓冲器（分配） 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 输入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 输出:HCSL，LVDS 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN（5x5） 包装:管件 |
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| ICS85320AMILFT | 功能描述:IC CLK TRANSLA 1:1 267MHZ 8-SOIC RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:HiPerClockS™ 标准包装:74 系列:- 类型:扇出缓冲器（分配） 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 输入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 输出:HCSL，LVDS 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN（5x5） 包装:管件 |
| ICS853210AYLF | 功能描述:IC CLOCK BUFFER 1:5 3GHZ 32-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:HiPerClockS™ 标准包装:1 系列:HiPerClockS™ 类型:扇出缓冲器（分配），多路复用器 电路数:1 比率 - 输入:输出:2:18 差分 - 输入:输出:是/无 输入:CML，LVCMOS，LVPECL，LVTTL，SSTL 输出:LVCMOS，LVTTL 频率 - 最大:250MHz 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP（7x7） 包装:- 其它名称:800-1923-6 |
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