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| 型号： | ICS853310AV |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 853310 SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28 |
| 封装： | 11.60 X 11.40 MM, 4.10 MM HEIGHT, PLASTIC, MS-018, LCC-28 |
| 文件页数： | 2/17页 |
| 文件大小： | 423K |
| 代理商： | ICS853310AV |
853310AV
www.icst.com/products/hiperclocks.html
REV. A NOVEMBER 22, 2005
10
Integrated
Circuit
Systems, Inc.
ICS853310
LOW SKEW, 1-TO-8
DIFFERENTIAL-TO-3.3V LVPECL/ECL FANOUT BUFFER
POWER, GROUND AND BYPASS CAPACITOR
This section provides a layout guide related to power, ground
and placement of bypass capacitors for a high-speed digital IC.
This layout guide is a general recommendation.The actual board
design will depend on the component types being used, the board
density and cost constraints. This description assumes that the
board has clean power and ground planes. The goal is to mini-
mize the ESR between the clean power/ground plane and the IC
power/ground pin.
A low ESR bypass capacitor should be used on each power pin.
The value of bypass capacitors ranges from 0.01uF to 0.1uF.
The bypass capacitors should be located as close to the power
GND
IC
Power pin
GND Pin
Via
GND Pad
C
Power Pad
FIGURE 4B. RECOMMENDED LAYOUT OF BYPASS CAPACITOR PLACEMENT
pin as possible. It is preferable to locate the bypass capacitor on
the same side as the IC. Figure 4B shows suggested capacitor
placement. Placing the bypass capacitor on the same side as
the IC allows the capacitor to have direct contact with the IC
power pin. This can avoid any vias between the bypass capaci-
tor and the IC power pins.
The vias should be placed at the Power/Ground pads.There should
be a minimum of one via per pin. Increasing the number of vias
from the Power/Ground pads to Power/Ground planes can im-
prove the conductivity.
ICS853310
LOW SKEW, 1-TO-8 DIFFERENTIAL-TO-3.3V LVPECL/ECL FANOUT BUFFER
TSD
IDT / ICS LOW SKEW, 1-TO-8 DIFFERENTIAL-TO-3.3V LVPECL/ECL FANOUT BUFFER
ICS853310
10
相关PDF资料 |
PDF描述 |
|---|---|
| ICS853310AVT | 853310 SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28 |
| ICS8533AG-01LNT | 8533 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| ICS8533AG-01T | LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| ICS8533AG-01 | LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| ICS8533AG-11LFT | 8533 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS853310AVLF | 功能描述:IC CLK BUFF MUX 2:8 2GHZ 28-PLCC RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:HiPerClockS™ 标准包装:1 系列:HiPerClockS™ 类型:扇出缓冲器（分配），多路复用器 电路数:1 比率 - 输入:输出:2:18 差分 - 输入:输出:是/无 输入:CML，LVCMOS，LVPECL，LVTTL，SSTL 输出:LVCMOS，LVTTL 频率 - 最大:250MHz 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP（7x7） 包装:- 其它名称:800-1923-6 |
| ICS853310AVLFT | 功能描述:IC CLK BUFF MUX 2:8 2GHZ 28-PLCC RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:HiPerClockS™ 标准包装:1 系列:HiPerClockS™ 类型:扇出缓冲器（分配），多路复用器 电路数:1 比率 - 输入:输出:2:18 差分 - 输入:输出:是/无 输入:CML，LVCMOS，LVPECL，LVTTL，SSTL 输出:LVCMOS，LVTTL 频率 - 最大:250MHz 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP（7x7） 包装:- 其它名称:800-1923-6 |
| ICS8533AG01 | 制造商:ICS 功能描述: |
| ICS8533AG-01LF | 功能描述:IC CLOCK BUFFER MUX 2:4 20-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:HiPerClockS™ 产品培训模块:High Bandwidth Product Overview 标准包装:1,000 系列:Precision Edge® 类型:扇出缓冲器（分配） 电路数:1 比率 - 输入:输出:1:4 差分 - 输入:输出:是/是 输入:CML，LVDS，LVPECL 输出:CML 频率 - 最大:2.5GHz 电源电压:2.375 V ~ 2.625 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-VFQFN 裸露焊盘，16-MLF? 供应商设备封装:16-MLF?（3x3） 包装:带卷 (TR) |
| ICS8533AG-01LFT | 功能描述:IC CLOCK BUFFER MUX 2:4 20-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:HiPerClockS™ 标准包装:74 系列:- 类型:扇出缓冲器（分配） 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 输入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 输出:HCSL，LVDS 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN（5x5） 包装:管件 |
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