参数资料
型号: ICS8545BGLF
元件分类: 时钟及定时
英文描述: 8545 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
封装: 6.50 X 4.40 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-20
文件页数: 11/12页
文件大小: 286K
代理商: ICS8545BGLF
8545BG
www.icst.com/products/hiperclocks.html
REV. C JANUARY 17, 2006
8
Integrated
Circuit
Systems, Inc.
ICS8545
LOW SKEW, 1-TO-4
LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER
3.3V LVDS DRIVER TERMINATION
A general LVDS interface is shown in Figure 2. In a 100
Ω
differential transmission line environment, LVDS drivers re-
quire a matched load termination of 100
Ω across near the
FIGURE 2. TYPICAL LVDS DRIVER TERMINATION
receiver input. For a multiple LVDS outputs buffer, if only par-
tial outputs are used, it is recommended to terminate the
unused outputs.
100 Ohm Differiential Transmission Line
R1
100
3.3V
+
-
LVDS_Driv er
3.3V
100
Ω
Ω Differential Transmission Line
APPLICATION INFORMATION
INPUTS:
CRYSTAL INPUT:
For applications not requiring the use of the crystal oscillator
input, both XTAL_IN and XTAL_OUT can be left floating.
Though not required, but for additional protection, a 1k
Ω
resistor can be tied from XTAL_IN to ground.
CLK INPUT:
For applications not requiring the use of a clock input, it can
be left floating. Though not required, but for additional
protection, a 1k
Ω resistor can be tied from the CLK input to
ground.
LVCMOS CONTROL PINS:
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
Ω resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVDS – Like OUTPUT
All unused LVDS output pairs can be either left floating or
terminated with 100
Ω across. If they are left floating, we
recommend that there is no trace attached.
相关PDF资料
PDF描述
ICS8545BGT 8545 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
ICS8545BGLFT 8545 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
ICS8545BGLF 8545 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
ICS8546AG-01LFT 266 MHz, OTHER CLOCK GENERATOR, PDSO24
ICS8546AG-01 266 MHz, OTHER CLOCK GENERATOR, PDSO24
相关代理商/技术参数
参数描述
ICS8545BGLFT 功能描述:IC CLOCK BUFFER MUX 2:4 20-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器,驱动器 系列:HiPerClockS™ 标准包装:74 系列:- 类型:扇出缓冲器(分配) 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 输入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 输出:HCSL,LVDS 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN(5x5) 包装:管件
ICS8546AG-01LF 功能描述:IC CLOCK BUFFER MUX 3:6 24-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器,驱动器 系列:HiPerClockS™ 产品培训模块:High Bandwidth Product Overview 标准包装:1,000 系列:Precision Edge® 类型:扇出缓冲器(分配) 电路数:1 比率 - 输入:输出:1:4 差分 - 输入:输出:是/是 输入:CML,LVDS,LVPECL 输出:CML 频率 - 最大:2.5GHz 电源电压:2.375 V ~ 2.625 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-VFQFN 裸露焊盘,16-MLF? 供应商设备封装:16-MLF?(3x3) 包装:带卷 (TR)
ICS8546AG-01LFT 功能描述:IC CLOCK BUFFER MUX 3:6 24-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器,驱动器 系列:HiPerClockS™ 标准包装:74 系列:- 类型:扇出缓冲器(分配) 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 输入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 输出:HCSL,LVDS 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN(5x5) 包装:管件
ICS8547AY 功能描述:IC CLK BUFFER 1:2 700MHZ 48-LQFP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器,驱动器 系列:HiPerClockS™ 标准包装:74 系列:- 类型:扇出缓冲器(分配) 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 输入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 输出:HCSL,LVDS 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN(5x5) 包装:管件
ICS854S006AGILF 功能描述:IC CLK BUFFER 1:6 1.7GHZ 24TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器,驱动器 系列:HiPerClockS™ 标准包装:74 系列:- 类型:扇出缓冲器(分配) 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 输入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 输出:HCSL,LVDS 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN(5x5) 包装:管件