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| 型号： | ICS87158AFLF |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 4/17页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK GEN 1-6 HCSL 48-SSOP |
| 标准包装： | 30 |
| 系列： | HiPerClockS™ |
| 类型： | 时钟发生器 |
| PLL： | 无 |
| 输入： | HCSL，LVDS，LVHSTL，LVPECL，SSTL |
| 输出： | HCSL，LVCMOS，LVTTL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:7 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 600MHz |
| 除法器/乘法器： | 是/是 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-BSSOP（0.295"，7.50mm 宽） |
| 供应商设备封装： | 48-SSOP |
| 包装： | 管件 |
| 其它名称： | 87158AFLF |
87158AG
www.idt.com
REV. C JULY 25, 2010
12
ICS87158
1-TO-6, LVPECL-TO-HCSL/LVCMOS
÷1, ÷2, ÷4 CLOCK GENERATOR
D2
B) Input with internal pull down resistor
D2
INPUT_DOWN
D1
INPUT_PU
RU
51K
VDD
RD
51K
VDD
A) Input with internal pull up resistor
LOGIC CONTROL INPUT
The logic input control signals are 3.3V LVCMOS compatible.
The logic control input contains ESD diodes and either pull-up
or pull-down resistor as shown in Figure 5. The data sheet pro-
vides pull-up or pull-down information for each input pin. Leav-
ing the input floating will set the control logic to default setting.
HCSL DRIVER TERMINATION
The HCSL is a differential constant current source driver. The
output current is set by control pins MULT_[1:0] and the value of
resistor Rref.
In the characteristic impedance of 50 Ohm environment, the
match load 50 Ohm resistors R4 and R5 are terminated at the
receiving end of the transmission line. The 33 Ohm series resis-
tor R6 and R7 should be located as close to the driver pins as
possible. For the clock traces that required very low skew should
have equal length.
Other general rules of high-speed digital design also should be
followed. Some check points are listed as follows:
-
Avoid sharp angles on the clock trace. Sharp angle turn
causes the characteristic impedance change on the
transmission lines.
-
Keep the clock trace on same layer. Whenever possible,
avoid any vias on the middle clock traces. Any via on
middle the trace can affect the trace characteristic
impedance and hence degrade signal quality.
-
There should be sufficient space between the clock traces
that have different frequencies to avoid cross talk.
-
No other signal trace is routed between the clock trace
pair.
-
Transmission line should not be routed across the split
plane on the adjacent layer.
To set logic high, the input pin connected directly to V
DD. To set
logic low, the control input connect directly to ground. For con-
trol signal source from the driver that has different power sup-
ply, a series current resistor of greater than 100 Ohm is required
for random power on sequence.
FIGURE 5. LOGIC INPUT CONTROLS
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS87158AFLFT | 功能描述:IC CLOCK GEN 1-6 HCSL 48-SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS87158AGLF | 功能描述:IC CLOCK GEN 1-6 HCSL 48-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS87158AGLFT | 功能描述:IC CLOCK GEN 1-6 HCSL 48-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS87159AGLF | 功能描述:IC CLOCK GEN 1-8 LVCMOS 56-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:Precision Edge® 类型:时钟/频率合成器 PLL:无 输入:CML，PECL 输出:CML 电路数:1 比率 - 输入:输出:2:1 差分 - 输入:输出:是/是 频率 - 最大:10.7GHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-VFQFN 裸露焊盘，16-MLF? 供应商设备封装:16-MLF?（3x3） 包装:带卷 (TR) 其它名称:SY58052UMGTRSY58052UMGTR-ND |
| ICS87159AGLFT | 功能描述:IC CLOCK GEN 1-8 LVCMOS 56-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:HiPerClockS™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
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