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| 型号： | ICS873034AMLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 873034 SERIES, LOW SKEW CLOCK DRIVER, 3 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封装： | 7.50 X 10.30 MM, 2.30 MM HEIGHT, ROHS COMPLIANT, MS-012, SOIC-16 |
| 文件页数： | 4/16页 |
| 文件大小： | 298K |
| 代理商： | ICS873034AMLFT |
873034AM
12
REV. A JANUARY 17, 2008
ICS873034
LOW SKEW, ÷2, ÷4, ÷8 DIFFERENTIAL-TO-
2.5V, 3.3V LVPECL/ECL CLOCK GENERATOR
PRELIMINARY
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS873034.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS873034 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
CC = 3.8V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX = VCC_MAX * IEE_MAX = 3.8V * 40mA = 152mW
Power (outputs)
MAX = 27.83mW/Loaded Output pair
If all outputs are loaded, the total power is 3 * 27.83mW = 83.5mW
Total Power
_MAX (3.8, with all outputs switching) = 152mW + 83.5mW = 235.5mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of
the device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming
a moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 82°C/W per Table 6A below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.236W * 82°C/W = 104.4°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 6A. THERMAL RESISTANCE
θθθθθ
JA
FOR
16-PIN SOIC, FORCED CONVECTION
TABLE 6B. THERMAL RESISTANCE
θθθθθ
JA
FOR
16-PIN TSSOP, FORCED CONVECTION
θθθθθ
JA by Velocity (Linear Feet per Minute)
0
200
500
Multi-Layer PCB, JEDEC Standard Test Boards
90°C/W
82°C/W
78°C/W
θθθθθ
JA by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
137.1°C/W
118.2°C/W
106.8°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
89.0°C/W
81.8°C/W
78.1°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
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