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| 型号： | ICS87321AMILFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 87321 SERIES, LOW SKEW CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| 封装： | 3.90 X 4.90 MM, 1.37 MM HEIGHT, ROHS COMPLIANT, MS-012, SOIC-8 |
| 文件页数： | 14/14页 |
| 文件大小： | 1850K |
| 代理商： | ICS87321AMILFT |
IDT / ICS 3.3V LVPECL CLOCK GENERATOR
9
ICS87321AMI REV A SEPTEMBER 29, 2006
ICS87321I
÷1/÷2 DIFFERENTIAL-TO-3.3V LVPECL CLOCK GENERATOR
PRELIMINARY
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS87321I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS87321I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
CC
= 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipation into the load.
Power (core)
MAX
= V
CC_MAX
* I
EE_MAX
= 3.465V * 15mA = 51.97mW
Power (outputs)
MAX
= 3.465mW/Loaded Output pair
Total Power
_MAX
(3.465V, with all outputs switching) = 51.97mW + 30mW = 81.97mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
TM devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming a
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 103.3°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.082W * 103.3°C/W = 93.5°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 6. THERMAL RESISTANCE
θθθθθ
JA
FOR
8-PIN SOIC, FORCED CONVECTION
θθθθθ
JA
by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
153.3°C/W
128.5°C/W
115.5°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
112.7°C/W
103.3°C/W
97.1°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
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相关代理商/技术参数 |
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