参数资料
型号: ICS873991AYLFT
厂商: IDT, Integrated Device Technology Inc
文件页数: 4/18页
文件大小: 0K
描述: IC CLK GEN LV LVPECL 52-LQFP
标准包装: 500
系列: HiPerClockS™
类型: 时钟发生器
PLL: 带旁路
输入: CML,LVPECL,SSTL
输出: LVPECL
电路数: 1
比率 - 输入:输出: 1:13
差分 - 输入:输出: 是/是
频率 - 最大: 400MHz
除法器/乘法器: 是/无
电源电压: 3.135 V ~ 3.465 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 52-LQFP
供应商设备封装: 52-TQFP(10x10)
包装: 带卷 (TR)
其它名称: 873991AYLFT
873991AY
www.idt.com
REV. A JULY 25, 2010
12
ICS873991
LOW VOLTAGE, LVCMOS/
LVPECL-TO-LVPECL/ECL CLOCK GENERATOR
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS873991.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS873991 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
CC = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX = VCC_MAX * IEE_MAX = 3.465V * 165mA = 571.7mW
Power (outputs)
MAX = 30mW/Loaded Output pair
If all outputs are loaded, the total power is 14 * 30mW = 420mW
Total Power
_MAX (3.465V, with all outputs switching) = 571.7mW + 420mW = 991.7mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for the devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming a
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 47.1°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.992W * 47.1°C/W = 116.7°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
θθθθθ
JA by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
58.0°C/W
47.1°C/W
42.0°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
42.3°C/W
36.4°C/W
34.0°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TABLE 7. THERMAL RESISTANCE
θθθθθ
JA
FOR
52-PIN LQFP, FORCED CONVECTION
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