参数资料
型号: ICS9112YM-26LF-T
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟及定时
英文描述: LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
封装: 0.150 INCH, SOIC-8
文件页数: 2/4页
文件大小: 74K
代理商: ICS9112YM-26LF-T
2
ICS9112-26
Notes:
1.
Guaranteed by design and characterization. Not subject to 100% test.
2.
CLK_IN input has a threshold voltage of 1.4V
3.
All parameters expected with loaded outputs
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to VDD +0.5 V
Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect product reliability.
Electrical Characteristics at 3.3V
TA = 0 - 70C; Supply Voltage VDD = 3.3 V +/-5% (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VDD = min to max, IOH = -1 mA
VDD - 0.2
3.3
V
VDD = 3V, IOH = -24 mA
2
2.9
V
VDD = 3V, IOH = 12 mA
2.4
3.1
V
VDD = min to max, IOH = 1 mA
0.0055
0.2
V
VDD = 3V, IOH = 24 mA
0.28
0.8
V
VDD = 3V, IOH = 12 mA
0.14
0.55
V
VDD = 3V, VO = 1V
-61
-50
VDD = 3.3V, VO = 1.65V
-77
VDD = 3V, VO = 2V
60
103
VDD = 3.3V, VO = 1.65V
111
Input Current
II
V = VO or VDD
-5
5
A
Input Capacitance
1
CI
VDD = 3.3V, VI = 0V or 3.3V
3pF
Output Capacitance
1
CO
VDD = 3.3V, VI = 0V or 3.3V
3.2
pF
REF = 0 MHz
22
50
A
Unloaded outputs at 66.67 MHz
25
40
mA
1. Guaranteed by design, not 100% tested in production.
High-level Input Current
IOH
High-level Output Voltage
VOH
Low-level Output Voltage
VOL
Low-level Input Current
IOL
Supply current
IDD
Switching Characteristics at 3.3V
TA = 0 - 70C; Supply Voltage VDD = 3.3 V +/-5% (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Low-to-high Propagation Delay
1
tPLH
VO = VDD/2
45.6
7
ns
High-to-low Propagation Delay
1
tPHL
VO = VDD/2
45.2
7
ns
Output Skew Window
1
Tsk(O)
VO = VDD/2
50
100
ps
Process Skew
1
Tsk(PR)
VO = VDD/2
0.5
ps
66 MHz
6
133 MHz
3
66 MHz
6
133 MHz
3
Output Rise Slew Rate
1
Tr
0.3 to 0.6 VDD
23.6
5
V/ns
Output Rise Slew Rate
1
Tf
0.3 to 0.6 VDD
23.2
5
V/ns
1. Guaranteed by design, not 100% tested in production.
CLKIN Low Time
1
Tlow
ns
CLKIN High Time
1
Thigh
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