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参数资料
| 型号： | ICS9148F-02 |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 66.6 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | 0.300 INCH, SSOP-48 |
| 文件页数： | 14/16页 |
| 文件大小： | 691K |
| 代理商： | ICS9148F-02 |
7
ICS9148-02
Notes:
1. TCLK is a test clock driven on the X1 (crystal in pin) input during test mode.
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Byte 1: CPU, 24/48 MHz Clock Register
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Byte 2: PCICLK Clock Register
Byte 4: SDRAM Clock Register
Notes: 1 = Enabled; 0 = Disabled, outputs held low
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Byte 3: SDRAM Clock Register
Notes: 1 = Enabled; 0 = Disabled, outputs held low
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Select Functions
Note: PWD = Power-Up Default
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS9148F-02CW | 制造商:ICS 功能描述:9148F-02CW |
| ICS9148F-02T | 制造商:ICS 功能描述:9148F-02T |
| ICS9148F-03 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUM/ProTM |
| ICS9148F05 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Interface IC |
| ICS9148F06 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Interface IC |
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