- 您现在的位置：买卖IC网 > PDF目录65534 > ICS9148F-60LF (INTEGRATED DEVICE TECHNOLOGY INC) 133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 PDF资料下载
参数资料
| 型号： | ICS9148F-60LF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 封装： | SSOP-28 |
| 文件页数： | 5/10页 |
| 文件大小： | 411K |
| 代理商： | ICS9148F-60LF |
4
ICS9148-60
Note: PWD = Power-Up Default
Byte 3: Functionality & Frequency Select
& Spread Slect Register
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Byte 4:
Notes: 1 = Enabled; 0 = Disabled, outputs held low
t
i
B#
n
i
Pe
m
a
N
n
i
PD
W
P
n
o
i
t
p
i
r
c
s
e
D
0
=
e
u
l
a
V
t
i
B1
=
e
u
l
a
V
t
i
B
7-
-
)
d
e
v
r
e
s
e
R
()
d
e
v
r
e
s
e
R
(
6-
-
)
d
e
v
r
e
s
e
R
()
d
e
v
r
e
s
e
R
(
5-
-
)
d
e
v
r
e
s
e
R
()
d
e
v
r
e
s
e
R
(
4-
-
)
d
e
v
r
e
s
e
R
()
d
e
v
r
e
s
e
R
(
3-
-
)
d
e
v
r
e
s
e
R
()
d
e
v
r
e
s
e
R
(
21
K
L
C
U
P
C1
d
e
l
b
a
s
i
D
)
w
o
l
(
d
e
l
b
a
n
E
1-
-
0
)
d
e
v
r
e
s
e
R
()
d
e
v
r
e
s
e
R
(
02
20
K
L
C
U
P
C1
)
d
e
l
b
a
s
i
D
(
)
w
o
l
(
d
e
l
b
a
n
E
Byte 5:
Notes: 1 = Enabled; 0 = Disabled, outputs held low
t
i
B#
n
i
Pe
m
a
N
n
i
PD
W
P
n
o
i
t
p
i
r
c
s
e
D
0
=
e
u
l
a
V
t
i
B1
=
e
u
l
a
V
t
i
B
74
F
_
K
L
C
I
C
P1
d
e
l
b
a
s
i
D
)
w
o
l
(
d
e
l
b
a
n
E
61
15
K
L
C
I
C
P1
d
e
l
b
a
s
i
D
)
w
o
l
(
d
e
l
b
a
n
E
50
14
K
L
C
I
C
P1
d
e
l
b
a
s
i
D
)
w
o
l
(
d
e
l
b
a
n
E
4-
-
0
)
d
e
v
r
e
s
e
R
()
d
e
v
r
e
s
e
R
(
38
3
K
L
C
I
C
P1
d
e
l
b
a
s
i
D
)
w
o
l
(
d
e
l
b
a
n
E
27
2
K
L
C
I
C
P1
d
e
l
b
a
s
i
D
)
w
o
l
(
d
e
l
b
a
n
E
16
1
K
L
C
I
C
P1
d
e
l
b
a
s
i
D
)
w
o
l
(
d
e
l
b
a
n
E
05
0
K
L
C
I
C
P1
d
e
l
b
a
s
i
D
)
w
o
l
(
d
e
l
b
a
n
E
Serial Bitmap
Byte 6:
t
i
B#
n
i
Pe
m
a
N
n
i
PD
W
P
n
o
i
t
p
i
r
c
s
e
D
0
=
e
u
l
a
V
t
i
B1
=
e
u
l
a
V
t
i
B
7-
-
0
)
d
e
v
r
e
s
e
R
()
d
e
v
r
e
s
e
R
(
6-
-
0
)
d
e
v
r
e
s
e
R
()
d
e
v
r
e
s
e
R
(
54
2C
I
P
A
O
I1
d
e
l
b
a
s
i
D
)
w
o
l
(
d
e
l
b
a
n
E
4-
-
0
)
d
e
v
r
e
s
e
R
()
d
e
v
r
e
s
e
R
(
3-
-
0
)
d
e
v
r
e
s
e
R
()
d
e
v
r
e
s
e
R
(
2-
-
0
)
d
e
v
r
e
s
e
R
()
d
e
v
r
e
s
e
R
(
17
20
F
E
R1
)
d
e
l
b
a
s
i
D
(
)
w
o
l
(
d
e
l
b
a
n
E
07
20
F
E
R1
)
d
e
l
b
a
s
i
D
(
)
w
o
l
(
d
e
l
b
a
n
E
Notes:
1 = Enabled; 0 = Disabled, outputs held low
For pin 27, there are 2 output stages together for 1 pin. These 2
latches must be both 0 or 1 simultaneously or there will be a short to
ground if one is disabled and the other is running.
t
i
Bn
o
i
t
p
i
r
c
s
e
DD
W
P
7
)
5
2
.
0
±
(
d
a
e
r
p
S
r
e
t
n
e
C
:
0
)
%
6
.
0
-
o
t
0
(
d
a
e
r
p
S
n
w
o
D
:
1
0
4
:
6
t
i
B
4
5
6
U
P
CI
C
P
0
1
0
1
0
1
0
1
0
1
0
1
5
.
8
6
0
.
5
7
3
.
3
8
6
.
6
3
0
1
2
1
3
.
3
1
0
1
5
2
.
4
3
5
.
7
3
6
.
1
4
3
.
3
.
4
3
.
7
3
4
.
4
3
.
3
0
3
y
b
d
e
t
c
e
l
e
s
i
y
c
n
e
u
q
e
r
F
-
0
#
6
.
6
/
0
1
L
E
S
t
c
e
l
e
s
e
r
a
w
d
r
a
h
e
v
o
b
a
4
:
6
y
b
d
e
t
c
e
l
e
s
i
y
c
n
e
u
q
e
r
F
-
1
0
2)
d
e
v
r
e
s
e
R
(
0
1
n
o
i
t
a
r
e
p
o
l
a
m
r
o
N
-
0
e
d
o
m
t
s
e
T
-
1
0
N
O
m
u
r
t
c
e
r
p
s
d
a
e
r
p
S
-
0
1
s
t
u
p
t
u
o
l
a
e
t
a
t
s
i
r
T
-
1
0
相关PDF资料 |
PDF描述 |
|---|---|
| ICS9158-05M | 66.7 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO24 |
| ICS9159-13CW28W | 66.6 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| ICS9159F-12LF | 66.47 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| ICS9159F-12LF | 66.47 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| ICS9159M-05 | 66.6 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS9148F-75-T | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for Mother Boards |
| ICS9148F-PPP-T | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for Mother Boards |
| ICS9148G-12 | 制造商:ICS 制造商全称:ICS 功能描述:Pentium/ProTM System Clock Chip |
| ICS9148M-46 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:CPU System Clock Generator |
| ICS9148M-47 | 制造商:ICS 制造商全称:ICS 功能描述:Pentium/ProTM System Clock Chip |
发布紧急采购，3分钟左右您将得到回复。