参数资料
型号: ICS91720YMLF-T
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟及定时
英文描述: 91720 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
封装: 0.150 INCH, LEAD FREE, MS-012, SOIC-8
文件页数: 11/11页
文件大小: 91K
代理商: ICS91720YMLF-T
9
ICS91720
0698D—10/05/04
Electrical Characteristics - CLKOUT
TA = 0 - 85°C; VDD = 3.3V +/-5%; CL = 10-20 pF (unless otherwise specified)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Output High Voltage
VOH3
IOH = -1 mA
2.4
V
Output Low Voltage
VOL3
IOL = 1 mA
0.4
Rise Time
tr3
VOL = 0.41V, VOH = 0.86V
0.5
0.6
1
ns
Fall Time
tf3
VOH = 0.86V VOL = 0.41V
0.5
0.6
1
ns
Duty Cycle
dt3
measurement from differential wavefrom -
0.35V to +035V
45
50
55
%
Jitter, Cycle to cycle
tjcyc-cyc
1
VT = 50%
50
150
ps
1Guaranteed by design, not 100% tested in production.
Electrical Characteristics - REF
TA = 0 - 85°C; VDD = 3.3V +/-5%; CL = 10-20 pF (unless otherwise specified)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Output Frequency
FO1
MHz
Output Impedance
RDSP1
1
VO = VDD*(0.5)
20
48
60
Output High Voltage
VOH
1
IOH = -1 mA
2.4
V
Output Low Voltage
VOL
1
IOL = 1 mA
0.4
V
Output High Current
IOH
1
V OH@MIN = 1.0 V, V OH@MAX = 3.135 V
-29
-23
mA
Output Low Current
IOL
1
VOL @MIN = 1.95 V, VOL @MAX = 0.4 V
29
27
mA
Rise Time
tr1
1
VOL = 0.4 V, VOH = 2.4 V
1
1.2
2
ns
Fall Time
tf1
1
VOH = 2.4 V, VOL = 0.4 V
1
1.2
2
ns
Duty Cycle
dt1
1
VT = 1.5 V
45
51
55
%
Jitter
tjcyc-cyc
1
VT = 1.5 V
105
300
ps
1Guaranteed by design, not 100% tested in production.
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