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参数资料
| 型号： | ICS9173B-15CS08LFT |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 5/9页 |
| 文件大小： | 0K |
| 描述： | IC PLL VIDEO GENLOCK 8SOIC |
| 标准包装： | 2,500 |
| 类型： | 时钟/频率倍增器 |
| PLL： | 是 |
| 主要目的： | 视频同步锁相 |
| 输入： | 时钟 |
| 输出： | 时钟 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:2 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 37.5MHz |
| 电源电压： | 4.75 V ~ 5.25 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 带卷 (TR) |
ICS9173B
VIDEO GENLOCK PLL
CLOCK SYNTHESIZER
IDT VIDEO GENLOCK PLL
5
ICS9173B
REV D 012913
AC Electrical Characteristics
Unless stated otherwise, VDD = 5 V ±5%, Ambient Temperature 0 to +70
C
Notes:
1. Parameter is guaranteed by design and characterization. Not 100% tested in production.
2. Input Reference Frequency = 25 kHz, Output Frequency = 25 MHz. Jitter measured between adjacent vertical
pixels.
3. CLK1 frequency applies for FS = 0. For FS = 1 condition, divide allowable CLK1 range by the factor of 4.
4. An Application Brief (AB01) documents the operation of the AV9173 for low input frequencies. This provides
guidelines for usable output frequencies and feedback ratios required to use inputs below 25 kHz. By following
these guidelines, the ICS9173B will operate down to 12 kHz inputs across temperature, voltage and lot-to-lot
variation.
5. Jitter values are measured at frequencies > 25 MHz for IDT9173B-01, for ICS9173B-15, jitter is measured at
frequency > 12.5 MHz.
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Output Clock Rise Time 1
ICLKr
10
ns
Output Clock Fall Time 1
ICLKf
10
ns
Output Rise Time 1
tr1
15 pF load, 0.8 to 2.0V
0.6
1.5
ns
Output Rise Time 1
tr2
15 pF load, 20% to 80% VDD
1.3
3.0
ns
Output Fall Time 1
tf1
15 pF load, 0.8 to 2.0V
0.6
1.5
ns
Output Fall Time 1
tf2
15 pF load, 80% to 20% VDD
0.7
2.0
ns
Output Duty Cycle 1
15 pF load
40
47
55
%
One-Sigma Jitter 1, 5
T1S1
CLK1 frequency 3, 25 MHz
120
250
ps
Jitter, Absolute 1, 5
TABS1
CLK1 frequency 3, 25 MHz
-400
±250
400
ps
One-Sigma Jitter 1, 5
T1S2
CLK1 frequency < 25 MHz
1
%
Jitter, Absolute 1, 5
TABS2
CLK1 frequency < 25 MHz
2
%
Line-to-Line Jitter 1, Absolute 2
TLABS
±4
ns
Input Frequency 1, IN or FBIN
fIN
see allowable fi below
12
1000
kHz
CLK1 Frequency, -01 1, 3, 4
fCLK1
12 < fIN < 14 kHz
44
75
MHz
14 < fIN < 17 kHz
30
75
17 < fIN < 30 kHz
25
75
30 < fIN < 35 kHz
15
75
35 < fIN < 1000 kHz
10
75
CLK1 Frequency, -15 1, 3, 4
fCLK1
12 < fIN < 14 kHz
22
37.5
MHz
14 < fIN < 17 kHz
15
37.5
17 < fIN < 30 kHz
12.5
37.5
30 < fIN < 35 kHz
7.5
37.5
35 < fIN < 1000 kHz
5
37.5
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