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参数资料
| 型号： | ICS9248YF-39-T |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | 0.300 INCH, SSOP-48 |
| 文件页数： | 14/17页 |
| 文件大小： | 680K |
| 代理商： | ICS9248YF-39-T |
6
ICS9248-39
0277H—06/22/06
Byte 4: Reserved Active/Inactive Register (1 = enable, 0 = disable)
Byte 5: Peripheral Active/Inactive Register (1 = enable, 0 = disable)
Notes:
1. Inactive means outputs are held LOW and are disabled from switching.
2. Latched Frequency Selects (FS#) will be inverted logic load of the input frequency select pin conditions.
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