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参数资料
| 型号： | ICS9250BF-28 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 133.32 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封装： | 0.300 INCH, SSOP-56 |
| 文件页数： | 4/19页 |
| 文件大小： | 226K |
| 代理商： | ICS9250BF-28 |
12
ICS9250-28
Group Skews (CPU 66 MHz, SDRAM 100MHz)
TA = 0 - 70 C; VDD = 3.3 V +/-5%, VDDL = 2.5 V +/-5%
CPU & IOAPIC load (lumped) = 20 pF; PCI, SDRAM, 3V66 load (lumped) = 30 pF
Refer to Group Offset Waveforms diagram for definition of transition edges.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
CPU to SDRAM
Skew
1
Tsk1 CPU-SDRAM
-3
-2.7
-2
ns
Skew Window
1
Tw1 CPU-SDRAM
0
165
500
ps
CPU to 3V66
Skew
1
Tsk1 CPU-3V66
77.6
8
ns
Skew Window
1
Tw1 CPU-3V66
0
105
500
ps
SDRAM to 3V66
Skew
1
Tsk1 SDRAM-3V66
-500
180
500
ps
Skew Window
1
Tw1 SDRAM-3V66
0
210
500
ps
3V66 to PCI
Skew
1
Tsk1 3V66-PCI
1.5
2.1
3.5
ns
Skew Window
1
Tw1 3V66-PCI
0
90
500
ps
IOAPIC to PCI
Skew
1
Tsk1 IOAPIC-PCI
-1
-0.1
1
ns
Skew Window
1
Tw1 IOAPIC-PCI
001
ns
1Guaranteed by design, not 100% tested in production.
Group Skews (CPU 100 MHz, SDRAM 100MHz)
TA = 0 - 70 C; VDD = 3.3 V +/-5%, VDDL = 2.5 V +/-5%
CPU & IOAPIC load (lumped) = 20 pF; PCI, SDRAM, 3V66 load (lumped) = 30 pF
Refer to Group Offset Waveforms diagram for definition of transition edges.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
CPU to SDRAM
Skew
1
Tsk2 CPU-SDRAM
4.5
4.9
5.5
ns
Skew Window
1
Tw2 CPU-SDRAM
0
180
500
ps
CPU to 3V66
Skew
1
Tsk2 CPU-3V66
4.5
5
5.5
ns
Skew Window
1
Tw2 CPU-3V66
0
100
500
ps
SDRAM to 3V66
Skew
1
Tsk2 SDRAM-3V66
-500
175
500
ps
Skew Window
1
Tw2 SDRAM-3V66
0
200
500
ps
3V66 to PCI
Skew
1
Tsk2 3V66-PCI
1.5
2.1
3.5
ns
Skew Window
1
Tw2 3V66-PCI
0
90
500
ps
IOAPIC to PCI
Skew
1
Tsk2 IOAPIC-PCI
-1
-0.1
1
ns
Skew Window
1
Tw2 IOAPIC-PCI
001
ns
1Guaranteed by design, not 100% tested in production.
CPU @ 1.25 V, 3V66 @ 1.5 V
SDRAM, 3V66 @ 1.5 V
3V66, PCI @ 1.5 V
IOAPIC @ 1.25 V, PCI @ 1.5 V
CPU @ 1.25 V, SDRAM @ 1.5 V
CPU @ 1.25 V, 3V66 @ 1.5 V
SDRAM, 3V66 @ 1.5 V
3V66, PCI @ 1.5 V
IOAPIC @ 1.25 V, PCI @ 1.5 V
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