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| 型号： | ICS93V847AG-T |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 93V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| 封装： | 0.173 INCH, MO-153, TSSOP-24 |
| 文件页数： | 2/10页 |
| 文件大小： | 92K |
| 代理商： | ICS93V847AG-T |
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Home > Products > Memory Interface Products > RDIMM > DDR > DDR PLL > 93V847A
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93V847A (DDR PLL)
Description
Market Group
DIMM
Additional Info
You may also like...
Related Orderable Parts
Attributes
93V847AG
93V847AGLF
93V847AGLFT
93V847AGT
Package
TSSOP 24 (PG24)
TSSOP 24 (PGG24)
TSSOP 24 (PG24)
Speed
NA
Temperature
C
Voltage
2.5 V
Status
Active
Sample
No
Minimum Order Quantity
372
2500
Factory Order Increment
62
2500
Page 1 of 1
08-Jun-2007
mhtml:file://C:\93V847.mht
相关PDF资料 |
PDF描述 |
|---|---|
| ICS93V847AGLF | 93V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| ICS93V847YG-T | PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| ICS93V847YGLF-T | PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| ICS93V847YGLF-T | PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| ICS93V850YGLFT | PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS93V850 | 制造商:ICS 制造商全称:ICS 功能描述:DDR Phase Lock Loop Clock Driver |
| ICS93V850CG | 制造商:INT_CIR_SYS 功能描述: |
| ICS93V850YGT | 制造商:ICS 制造商全称:ICS 功能描述:DDR Phase Lock Loop Clock Driver |
| ICS93V855 | 制造商:ICS 制造商全称:ICS 功能描述:DDR Phase Lock Loop Clock Driver |
| ICS93V855AG | 功能描述:IC DDR PLL CLOCK DRIVER 28-TSSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
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