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参数资料
| 型号： | ICS94201DFLFT |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 19/19页 |
| 文件大小： | 0K |
| 描述： | IC FREQ GENERATOR PROGR 56-SSOP |
| 标准包装： | 1,000 |
| 类型： | 时钟/频率发生器，多路复用器 |
| PLL： | 是 |
| 主要目的： | Intel CPU 服务器 |
| 输入： | 晶体 |
| 输出： | 时钟 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 2:29 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 500.03MHz |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 56-BSSOP（0.295"，7.50mm 宽） |
| 供应商设备封装： | 56-SSOP |
| 包装： | 带卷 (TR) |
| 其它名称： | 94201DFLFT |
9
ICS94201
0428B - 11/28/05
Byte 16: Spread Sectrum Control Register
Byte 17: Spread Spectrum Control Register
Note: Please utilize software utility provided by ICS
Application Engineering to configure spread spectrum.
Incorrect spread percentage may cause system failure.
Note: Please utilize software utility provided by ICS
Application Engineering to configure spread spectrum.
Incorrect spread percentage may cause system failure.
Byte 18: Output Dividers Control Register
Byte 19: Output Dividers Control Register
Note: Changing bits in these registers results in frequency
divider ratio changes. Incorrect configuration of
group gear ratio can cause system malfunction.
Note: Changing bits in these registers results in frequency
divider ratio changes. Incorrect configuration of
group gear ratio can cause system malfunction.
Notes:
1. PWD = Power on Default
2. The power on default for byte 16-20 depends on the harware (latch inputs FS[0:4]) or IIC (Byte 0 bit [1:7]) setting. Be sure to read
back and re-write the values of these 5 registers when VCO frequency change is desired for the first pass.
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Note:
1. User needs to ensure step 3 & 7 is carried out. Systems with the wrong spread percentage and/or group to group divider ratio
programmed into bytes 16-20 could be unstable. Step 3 & 7 assure the correct spread and gear ratio.
2. If VCO, REF divider values or phase detector stability are out of range, the device may fail to function correctly.
3. Follow min and max VCO frequency range provided. Internal PLL could be unstable if VCO frequency is too fast or too slow.
Use 14.31818MHz x VCO/REF divider values to calculate the VCO frequency (MHz).
4. Users can also utilize software utility provided to program the VCO frequency from ICS Application Engineering.
5. Spread percent needs to be calculated based on VCO frequency, spread modulation frequency and spread amount desired.
See Application note for software support.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS94201DFT | 功能描述:IC FREQ GENERATOR PROGR 56-SSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
| ICS94201YFT | 制造商:ICS 制造商全称:ICS 功能描述:Programmable System Frequency Generator for PII/III⑩ |
| ICS94203 | 制造商:ICS 制造商全称:ICS 功能描述:Programmable System Frequency Generator for PII/III⑩ |
| ICS94203F-T | 制造商:ICS 制造商全称:ICS 功能描述:Peripheral IC |
| ICS94203YF-T | 制造商:ICS 制造商全称:ICS 功能描述:Programmable System Frequency Generator for PII/III⑩ |
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