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参数资料
型号： ICS950218YFLF-T
英文描述： Programmable Timing Control Hub TM for P4 TM
中文描述： 可编程定时控制中心，为小四至商标商标
文件页数： 13/19页
文件大小： 143K
代理商： ICS950218YFLF-T
13
Integrated
Circuit
Systems, Inc.
ICS950218
0466B—03/17/04
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Logic Inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V
DD
+0.5 V
Ambient Operating Temperature . . . . . . . . . . . . . . . . . 0°C to +70°C
Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
T
A
= 0 - 70°C; Supply Voltage V
DD
= 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
Input High Voltage
V
IH
Input Low Voltage
V
IL
Input High Current
I
IH
V
IN
= V
DD
I
IL1
V
IN
= 0 V; Inputs with no pull-up resistors
I
IL2
V
IN
= 0 V; Inputs with pull-up resistors
I
DD3.3OP1
C
L
= 0pF; Select @ 66 MHz
I
DD3.3OP2
C
L
= Full load; Select @ 100 MHz
I
DD3.3OP3
C
L
=Full load; Select @ 133 MHz
Byte 23: Slew Rate Control Register
t
B
t
B
t
B
t
B
t
B
t
B
t
B
t
B
t
B
e
e
e
e
e
e
e
S
z
H
M
H
M
m
a
v
s
v
s
v
s
v
s
z
H
M
z
H
M
8
4
8
4
N
e
e
e
e
D
W
X
X
1
0
1
0
1
0
P
n
o
p
c
s
e
D
7
6
5
4
3
2
1
0
d
d
d
d
w
w
e
S
e
S
R
R
R
R
d
e
v
s
e
R
1
0
w
w
S
8
8
_
_
4
4
4
4
.
w
=
l
o
w
=
0
l
o
0
1
;
m
r
n
e
w
e
;
m
r
n
=
c
e
w
=
k
e
1
1
c
o
1
1
:
n
k
c
o
n
H
M
o
z
H
o
=
8
4
_
=
M
8
1
4
1
4
0
2
0
k
k
a
.
k
a
e
:
z
1
0
2
2
c
e
1
z
MIN
2
TYP
MAX
V
DD
+ 0.3
0.8
5
UNITS
V
V
V
SS
- 0.3
-5
-5
-200
90
230
233
100
360
360
Powerdown Current
Input Frequency
Pin Inductance
I
DD3.3PD
F
i
L
pin
C
IN
C
OUT
C
INX
T
trans
T
s
T
STAB
t
PZH
,t
PZL
t
PHZ
,t
PLZ
IREF=5 mA
V
DD
= 3.3 V
38.1
14.32
45
MHz
nH
pF
pF
pF
ms
ms
ms
ns
ns
7
5
6
45
3
3
3
10
10
Logic Inputs
Output pin capacitance
X1 & X2 pins
To 1st crossing of target frequency
From 1st crossing to 1% target frequency
From V
DD
= 3.3 V to 1% target frequency
Output enable delay (all outputs)
Output disable delay (all outputs)
27
36
Transition time
1
Settling time
1
Clk Stabilization
1
1
1
1
1
Guaranteed by design, not 100% tested in production.
Delay
1
Input Capacitance
1
Input Low Current
mA
Operating Supply
Current
μΑ
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