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参数资料
| 型号： | ICS950602YFLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | 0.300 INCH, MO-118, SSOP-48 |
| 文件页数： | 2/16页 |
| 文件大小： | 147K |
| 代理商： | ICS950602YFLFT |
10
Integrated
Circuit
Systems, Inc.
ICS950602
0469B—12/18/02
Electrical Characteristics - CPUCLK(T,C)
TA = 0 - 70°C; VDD=3.3V +/-5%; loads from Intel CK408B spec, Rev 1.1 (unless otherwise specified)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Current Source
Output Impedance
1
Output High Voltage
VOH2A
0.71
1.2
V
Output High Current
IOH32A
-13.92
mA
Rise Time
1
tr2A
VOL = -0.35V, VOH = 0.35V
175
220
467
ps
Fall Time
1
tf2A
VOH = 0.35V, VOL = -0.35V
175
230
467
ps
Differential Crossover
Voltage
1
V2A
Rs = 33.2
, Rp = 63.4 to gnd, R
T-C = 475
510
700
900
mV
Duty Cycle
1
dt2A
VT = crossing point
45
49
55
%
VT (CPU) = crossing point, VT (PCI) = 1.25 V
100 MHz
250
300
133 MHz
170
200
Skew, CPUT,C to PCI
1
tsk2A1
VT (CPU) = crossing point, VT (PCI) = 1.5 V
23.2
4
ns
Jitter, Cycle to cycle
1
tjcyc-cyc2A
VT = crossing point
CPU,SD = 100MHz
50
200
ps
1Guaranteed by design, not 100% tested in production.
VR = 475 +1%; IREF = 2.32 mA; IOH = 6*IREF
Skew, CPUT,C to CPU
1
tsk2A
ps
ZO2A
VO = Vx
3000
Electrical Characteristics - CPUCLK(1:0)
TA = 0 - 70°C; VDD=3.3V +/-5%; CL = 10-20 pF (unless otherwise specified)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Output Impedance
1
RDSP2B
VO = VDD*(0.5)
13.5
45
Output Impedance
1
RDSN2B
VO = VDD*(0.5)
13.5
45
Output High Voltage
VOH2B
IOH = -1 mA
2
Output Low Voltage
VOL2B
IOL = 1 mA
0.4
Output High Current
IOH2B
VOH@MIN = 1.0 V, VOH@MAX = 2.375 V
-27
27
Output Low Current
IOL2B
VOL@MIN = 1.2 V, VOL@MIN = 0.3 V
27
30
Rise Time
1
tr2B
VOL = 0.4V, VOH = 2.0V
0.7
Fall Time
1
tf2B
VOH = 2.0V VOL = 0.4V
0.8
VT = 50%
100MHz
50
133 MHz
54
Skew, CPU to CPU
1
tsk2B
VT = 1.25 V
60
175
ps
Skew, CPU to PCI
1
tsk2B1
VT (CPU) = 1.25 V, VT (PCI) = 1.5 V
23.2
4
ns
VT = 1.25V
CPU,SD = 100MHz
140
250
CPU,SD = 133 MHz
100
250
CPU = 100, SD = 133 MHz
220
275
1Guaranteed by design, not 100% tested in production.
0.4
1.6
V
V
ns
%
Jitter, Cycle to cycle
1
tjcyc-cyc2B
ps
Duty Cycle
1
dt2B
45
55
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