- 您现在的位置：买卖IC网 > PDF目录79599 > ICS950902DGLFT (INTEGRATED DEVICE TECHNOLOGY INC) 200.4 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 PDF资料下载
参数资料
| 型号： | ICS950902DGLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 200.4 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封装： | 6.10 MM, 0.50 MM PITCH, MO-153, TSSOP-56 |
| 文件页数： | 16/22页 |
| 文件大小： | 210K |
| 代理商： | ICS950902DGLFT |
3
Integrated
Circuit
Systems, Inc.
ICS950902
0475F—10/13/03
Pin Description Continued
PIN
#
NAME
TYPE
29
DDRC5/SDRAM11
OUT
"Complementary" Clock of differential memory output / 3.3V SDRAM clock output
30
DDRT5/SDRAM10
OUT
"True" Clock of differential memory output / 3.3V SDRAM clock output
31
DDRC4/SDRAM9
OUT
"Complementary" Clock of differential memory output / 3.3V SDRAM clock output
32
DDRT4/SDRAM8
OUT
"True" Clock of differential memory output / 3.3V SDRAM clock output
33
GND
PWR
Ground pin.
34
VDD3.3_2.5
PWR
2.5V or 3.3V nominal power supply voltage.
35
DDRC3/SDRAM7
OUT
"Complementary" Clock of differential memory output / 3.3V SDRAM clock output
36
DDRT3/SDRAM6
OUT
"True" Clock of differential memory output / 3.3V SDRAM clock output
37
DDRC2/SDRAM5
OUT
"Complementary" Clock of differential memory output / 3.3V SDRAM clock output
38
DDRT2/SDRAM4
OUT
"True" Clock of differential memory output / 3.3V SDRAM clock output
39
GND
PWR
Ground pin.
40
VDD3.3_2.5
PWR
2.5V or 3.3V nominal power supply voltage.
41
DDRC1/SDRAM3
OUT
"Complementary" Clock of differential memory output / 3.3V SDRAM clock output
42
DDRT1/SDRAM2
OUT
"True" Clock of differential memory output / 3.3V SDRAM clock output
43
DDRC0/SDRAM1
OUT
"Complementary" Clock of differential memory output / 3.3V SDRAM clock output
44
DDRT0/SDRAM0
OUT
"True" Clock of differential memory output / 3.3V SDRAM clock output
45
BUF_IN
IN
Input Buffers for memory outputs.
46
FBOUT
OUT
Memory feed back output.
47
GND
PWR
Ground pin.
48
CPUT_CS
OUT
"True" clocks of differential pair 2.5V push-pull CPU outputs.
49
CPUC_CS
OUT
Complementary" clocks of differential pair 2.5V push-pull CPU outputs.
50
VDDCPU2.5
PWR
Power pin for the CPUCLKs. 2.5V
51
VDDCPU3.3
PWR
Power pin for the CPUCLKs. 3.3V
52
CPUCLKC/CPUCLKODC
OUT
"Complementary" clocks of differential pair CPU outputs. These are current mode outputs.
External resistors are required for voltage bias / "Complementary" clocks of differential pair
CPU outputs. These open drain outputs need an external 1.5V pull-up / 2.5V CPU clock
output.
53
CPUCLKT/CPUCLKODT
OUT
"True" clocks of differential pair CPU outputs. These are current mode outputs. External
resistors are required for voltage bias / "True" clocks of differential pair CPU outputs. These
open drain outputs need an external 1.5V pull-up / 2.5V CPU clock output.
54
GND
PWR
Ground pin.
55
VDDREF
PWR
Ref, XTAL power supply, nominal 3.3V
56
Vtt_PWRGD#**/REF1
IN
This 3.3V LVTTL input is a level sensitive strobe used to determine when latch inputs are
valid and are ready to be sampled. This is an active low input. / 14.318 MHz reference clock.
DESCRIPTION
相关PDF资料 |
PDF描述 |
|---|---|
| ICS94228BFT | 233.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| ICS952302AGT | PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| IS80C51C-L16R | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQCC44 |
| IF280C51-25D | 8-BIT, MROM, 25 MHz, MICROCONTROLLER, PQFP44 |
| IP80C51T-25D | 8-BIT, MROM, 25 MHz, MICROCONTROLLER, PDIP40 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS950902YFLF-T | 制造商:ICS 制造商全称:ICS 功能描述:Programmable Timing Control Hub⑩ for P4⑩ |
| ICS950902YGLF-T | 制造商:ICS 制造商全称:ICS 功能描述:Programmable Timing Control Hub⑩ for P4⑩ |
| ICS950905 | 制造商:ICS 制造商全称:ICS 功能描述:Programmable Timing Control Hub⑩ for P4⑩ |
| ICS950908 | 制造商:ICS 制造商全称:ICS 功能描述:Programmable Timing Control Hub⑩ for P4⑩ |
| ICS950908BFLF | 功能描述:IC TIMING CTRL HUB P4 56-SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:TCH™ 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
发布紧急采购，3分钟左右您将得到回复。