- 您现在的位置：买卖IC网 > PDF目录79611 > ICS95V857CGLF8 (INTEGRATED DEVICE TECHNOLOGY INC) 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 PDF资料下载
参数资料
| 型号： | ICS95V857CGLF8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 封装： | 0.240 INCH, TSSOP-48 |
| 文件页数： | 11/15页 |
| 文件大小： | 215K |
| 代理商： | ICS95V857CGLF8 |
5
ICS95V857 -XXX
Preliminary Product Preview
0674I—03/28/03
Recommended Operating Condition (see note1)
TA = 0 - 85°C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Voltage
VDD, AVDD
2.3
2.7
V
CLKT, CLKC, FB_INC
VDD/2 - 0.18
V
PD#
-0.3
0.7
V
CLKT, CLKC, FB_INC
VDD/2 + 0.18
V
PD#
1.7
VDD + 0.6
V
DC input signal voltage
(note 2)
-0.3
VDD
V
DC - CLKT, FB_INT
0.36
VDD + 0.6
V
AC - CLKT, FB_INT
0.7
VDD + 0.6
V
Output differential cross-
voltage (note 4)
VOX
VDD/2 - 0.15
VDD/2 + 0.15
V
Input differential cross-
voltage (note 4)
VIX
VDD/2 - 0.2
VDD/2 + 0.2
V
High level output
current
IOH
-4.5
mA
Low level output current
IOL
4.5
mA
Input slew rate
SR
14
V/ns
Operating free-air
temperature
TA
085
°C
Differential input signal
voltage (note 3)
VID
Low level input voltage
VIL
High level input voltage
VIH
Notes:
1.
Unused inputs must be held high or low to prevent them from floating.
2.
DC input signal voltage specifies the allowable DC execution of differential input.
3.
Differential inputs signal voltages specifies the differential voltage [VTR-VCP]
required for switching, where VT is the true input level and VCP is the
complementary input level.
4.
Differential cross-point voltage is expected to track variations of VCC and is the
voltage at which the differential signal must be crossing.
相关PDF资料 |
PDF描述 |
|---|---|
| ICS9112AG-26 | 9112 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| ICS95V857CLLF-T | 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| ICS9112AG-27 | 9112 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| ICS95V2F857ALT | 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| ICS95V157AGI | 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS95V857CGLFT | 功能描述:IC CLK DVR PLL 1:10 48TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP （0.240"，6.10mm 宽） 供应商设备封装:64-TSSOP 包装:管件 |
| ICS95V857CGLF-T | 制造商:ICS 制造商全称:ICS 功能描述:2.5V Wide Range Frequency Clock Driver (45MHz - 233MHz) |
| ICS95V857CHLF-T | 制造商:ICS 制造商全称:ICS 功能描述:2.5V Wide Range Frequency Clock Driver (45MHz - 233MHz) |
| ICS95V857CKLF | 功能描述:IC CLK DVR PLL 1:10 40VFQFN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
| ICS95V857CKLF8 | 功能描述:IC CLK DVR PLL 1:10 40VFQFN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
发布紧急采购，3分钟左右您将得到回复。