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参数资料
| 型号： | ICSLV810SILF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 810 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 封装： | 0.300 INCH, SOIC-20 |
| 文件页数： | 1/13页 |
| 文件大小： | 241K |
| 代理商： | ICSLV810SILF |
ICSLV810
MDS LV810 D
1
Revision 062105
Integrated Circuit Systems, Inc.
● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
Buffer/Clock Driver
Description
The ICSLV810 is a low skew 1.5 V to 2.5 V, 1:10 fanout
buffer. This device is specifically designed for data
communications clock management. The large fanout
from a single input line reduces loading on the input
clock. The TTL level outputs reduce noise levels on the
part. Typical applications are clock and signal
distribution.
Features
Packaged in 20-pin SOIC/QSOP/SSOP
Split 1:10 fanout Buffer
Maximum skew between outputs of different
packages 0.75 ns
Max propagation delay of 3.8 ns
Operating voltage of 2.5 V on Bank A
Operating voltage of 1.5 V to 2.5 V on Banks B and C
Advanced, low power, CMOS process
Industrial temperature range -40° C to +85° C
3.3 V tolerant input
Block Diagram
CLK 1
CLK 2
CLK 3
CLK 4
CLK 5
CLK 6
CLK 7
CLK 8
CLK 9
CLK 10
VDDA
VDDB
CLKIN
VDDC
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